Receiver Termination Circuit for Independent Gain and Common-Mode Control

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Solution Overview

Problem

Existing termination circuits in receivers face challenges in independently controlling direct current (DC) gain, alternating current (AC) gain, and output common mode voltage without affecting each other, leading to issues such as over equalization, signal swing damage, and common mode voltage mismatch with linear equalizers.

Innovation Solution

A termination circuit comprising resistors, capacitors, and a bias signal generator that allows for separate control of DC gain, AC gain, and output common mode voltage, using gain adjustment circuits to adjust these parameters independently without affecting each other.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Loss of energy

If the circuit in front of the linear equalizer provides high gain in high frequency band to compensate for medium loss, then signal loss is compensated, but over equalization occurs when operating at low data rate

Engineering Contradiction:
Improvesignal lossVSAvoidover equalization
Core Design Contradiction:
Loss of energyVSReliability

Solution Approach 1:

The patent implements dynamic gain control in the termination circuit by using control voltage signals to adjust the effective resistance of resistors (R13, R23, R16, R26) based on data rate conditions. When operating at low data rate, the control voltage reduces the gain in the high frequency band to prevent over equalization, while maintaining appropriate gain at high data rate to compensate for medium loss.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent changes the electrical parameters (resistance values) of the termination circuit components dynamically based on operating conditions. By varying the resistance of key resistors through control voltages, the circuit adapts its frequency response characteristics to match different data rate requirements, preventing over equalization at low data rates while maintaining signal integrity at high data rates.

Inventive Principle:
Principle #35Parameter changes

2Power

If the circuit in front of the linear equalizer provides high DC gain to amplify weak signals, then signal amplification is improved, but transistors may operate in unwanted regions when signal swing is too big

Engineering Contradiction:
Improvesignal amplificationVSAvoidtransistor operation region
Core Design Contradiction:
PowerVSReliability

Solution Approach 1:

The patent dynamically adjusts the DC gain of the termination circuit by changing the resistance values of R13, R23, R16, and R26 based on signal swing conditions. When the input signal has small swing, the circuit provides high DC gain to amplify the weak signal. When the signal swing becomes too large, the control voltage adjusts the resistance to reduce DC gain, preventing transistors in the linear equalizer from operating in unwanted regions.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent implements a feedback mechanism where the control voltage generator monitors the signal conditions (swing amplitude, common mode voltage) and adjusts the termination circuit parameters accordingly. This feedback loop ensures that the DC gain is optimized for weak signals while preventing excessive amplification that would drive transistors into unwanted operating regions.

Inventive Principle:
Principle #23Feedback

3Stability of the object's composition

If the common mode voltage is kept fixed to maintain stable operation, then circuit stability is improved, but transistors cannot operate in optimal regions when supply voltage changes

Engineering Contradiction:
Improvecircuit stabilityVSAvoidtransistor optimal operation
Core Design Contradiction:
Stability of the object's compositionVSReliability

Solution Approach 1:

The patent implements dynamic common mode voltage adjustment by using the control voltage generator to modify the common mode voltage level based on the supply voltage of the linear equalizer. When the supply voltage changes, the control voltage automatically adjusts the common mode voltage to track the supply voltage changes, ensuring transistors operate in their optimal regions while maintaining overall circuit stability through controlled adaptation.

Inventive Principle:
Principle #15Dynamics

4Reliability

If separate control of DC gain, AC gain, and common mode voltage is implemented, then performance optimization is improved, but circuit complexity increases

Engineering Contradiction:
Improveperformance optimizationVSAvoidcircuit complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent achieves separate control of DC gain, AC gain, and common mode voltage through a unified control architecture where the control voltage generator produces a single control voltage that simultaneously affects multiple parameters. The resistors R13, R23, R16, and R26 serve multiple functions: they control both DC gain and common mode voltage through the same control voltage, reducing the need for separate control circuits for each parameter.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent merges the control functions for DC gain, AC gain, and common mode voltage adjustment into a single integrated control mechanism. The control voltage generator combines multiple control objectives into one control signal that simultaneously adjusts the resistance of multiple resistors, achieving independent parameter control while minimizing the overall circuit complexity through functional integration.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS12592849B2Termination circuit of receiver
Publication Date: 2026.03.31 REALTEK SEMICON CORP
  • US12592849B2 patent drawing
  • US12592849B2 patent drawing
  • US12592849B2 patent drawing

AI summary

A termination circuit of a receiver is provided. The termination circuit includes an input resistor, a capacitor, a first resistor, a second resistor, a third resistor and a bias signal generator. The input resistor is coupled between an input terminal of the termination circuit and a first reference voltage. The capacitor is coupled between a first node of the termination circuit and an output terminal of the termination circuit. The first resistor is coupled between the first node and a second node of the termination circuit. The second resistor is coupled between the second node and the output terminal. The third resistor is coupled between the second node and a control terminal of the termination circuit. In addition, the bias signal generator is coupled to the control terminal, and generates a control signal positively correlated with a second reference voltage to the control terminal.