Receiver Wake-Up Circuit With Delayed Buffer Enable
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Solution Overview
Problem
Existing electronic circuits face issues with glitches when waking up from deep sleep modes due to the receiver clock being turned on, which hinders quick and glitch-free transitions.
Innovation Solution
A circuit design incorporating a bias generator with a quick turn-on circuit and a delay circuit to stabilize the receiver and buffer outputs, ensuring rapid power-up without glitches, utilizing a bias generator to rapidly ramp up bias current and a delay circuit to prevent immediate buffer output, allowing for stable transitions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of time
If the receiver clock is turned on quickly when waking from deep sleep mode, then the wake-up time is reduced, but glitches occur in the output signal
Solution Approach 1:
The bias generator is activated before the receiver clock to pre-charge capacitors and prepare the circuit nodes. This preliminary action ensures that when the receiver clock transitions, the circuit is already in a stable state, preventing glitches while maintaining fast wake-up performance
Solution Approach 2:
Capacitors are strategically placed at critical nodes (such as the bias current output and receiver input) to cushion against sudden voltage changes during wake-up. These capacitors absorb transient energy and provide a stable voltage reference, preventing signal glitches during the transition from sleep to active mode
2Use of energy by moving object
If multiple sleep levels are implemented to save power, then power consumption is reduced, but circuit complexity increases
Solution Approach 1:
The circuit implements dynamic power management with multiple sleep levels (deep sleep and light sleep) that can be selectively entered based on operational requirements. The bias generator and receiver clock can be independently controlled to transition between these levels, providing flexible power savings without requiring a complex fixed architecture
Solution Approach 2:
The system changes operational parameters (bias current level, clock frequency) to transition between sleep modes and active mode. By adjusting these parameters dynamically, the circuit achieves multiple power levels using the same hardware components, reducing the need for additional complex circuitry
Data Source
AI summary
A circuit including a device including a receiver having a receiver input, a receiver output, and a bias current input and a bias generator having a bias current output coupled to the bias current input. The device also includes a buffer having a buffer input, an enable input, and a buffer output, the buffer input coupled to the receiver output and a delay circuit having a delay output coupled to the enable input.