Receiving Card for LED Displays with 10G Base-T Transceivers

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Solution Overview

Problem

Current LED display systems face insufficient transmission rates, particularly with the development of small pitch displays, where 1 Gbps is inadequate, leading to instability and high maintenance costs due to frequent plugging and unplugging of network cables.

Innovation Solution

The implementation of a receiving card with a programmable logic device, memory device, and multiple Ethernet interfaces, including 5 Gbase-T or 10 GBASE-T type physical layer transceivers, along with USB 3.0 interfaces and SerDes channels, enables higher transmission rates and flexible signal transmission modes, including wireless options, to enhance data transmission reliability and reduce maintenance complexity.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If 1 Gbps transmission rate is used in LED display systems, then device complexity is reduced, but transmission speed becomes insufficient for small pitch displays

Engineering Contradiction:
Improvetransmission rateVSAvoiddevice complexity
Core Design Contradiction:
SpeedVSDevice complexity

Solution Approach 1:

The patent changes the transmission rate parameter from 1 Gbps to 10 Gbps by upgrading the physical layer transceiver from 1Gbase-T to 10Gbase-T type, enabling higher speed data transmission for small pitch LED displays while maintaining system compatibility through standardized interface designs

Inventive Principle:
Principle #35Parameter changes

2Ease of operation

If network cables are frequently plugged and unplugged for maintenance, then ease of operation is improved, but reliability deteriorates due to transmission instability

Engineering Contradiction:
Improveease of operationVSAvoidtransmission reliability
Core Design Contradiction:
Ease of operationVSReliability

Solution Approach 1:

The patent implements dynamic link aggregation that can automatically adjust the number of active Ethernet interfaces based on transmission requirements, allowing the system to maintain stable multi-path transmission while providing flexible operational control without frequent cable reconnections

Inventive Principle:
Principle #15Dynamics

3Reliability

If multiple Ethernet interfaces are configured for high speed transmission, then transmission reliability is improved, but device complexity increases

Engineering Contradiction:
Improvetransmission reliabilityVSAvoiddevice complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent designs Ethernet interfaces with multi-functional capabilities that can operate in various modes including link aggregation, individual high-speed transmission, and wireless coordination, allowing a single interface structure to serve multiple purposes and reduce overall system complexity despite having multiple interfaces

Inventive Principle:
Principle #6Universality (Multi-functionality)

4Adaptability or versatility

If wireless transmission options are added to enhance flexibility, then adaptability is improved, but device complexity increases

Engineering Contradiction:
Improvesignal transmission flexibilityVSAvoiddevice complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent introduces a wireless transmission card as an intermediary component that can be independently added or removed without affecting the core receiving card structure, providing wireless transmission capability while maintaining modular architecture that limits the increase in overall system complexity

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS11829678B2Receiving card and display control card component
Publication Date: 2023.11.28 XIAN NOVASTAR TECH
  • US11829678B2 patent drawing
  • US11829678B2 patent drawing
  • US11829678B2 patent drawing

AI summary

Embodiments of the disclosure relate to a receiving card, which includes: a circuit board and a programmable logic device, a memory device, a plug-in component, a physical layer transceiver group and a plurality of Ethernet interfaces arranged on the circuit board. The memory device and the plug-in component are electrically connected with the programmable logic device; the plurality of Ethernet interfaces are respectively and electrically connected with a plurality of SerDes channels configured by the programmable logic device through the physical layer transceiver group; each of the plurality of SerDes channels includes two pairs of differential signal lines, and one of the two pairs of differential signal lines is used for transmitting data and the other pair of differential signal lines is used for receiving data.