Receiving Circuit Common-Node Layout for Stable Multi-Input Bandwidth
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Solution Overview
Problem
Conventional receiving circuits experience variations in frequency characteristics among input buffer circuits due to differing line lengths, leading to unstable signal reception when switching between input signals.
Innovation Solution
The receiving circuit includes input buffer circuits that can switch between output and cutoff modes, with all intermediate nodes connected to common nodes in the output circuit, equalizing loads and reducing frequency variations. This configuration involves constant current generation, voltage-to-current conversion, and bias voltage supply to maintain stable signal conversion.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If input buffer circuits are connected to the selector through separate pairs of lines, then signal selection capability is improved, but variations in frequency characteristics occur due to different line lengths
Solution Approach 1:
The patent applies equipotentiality by connecting all intermediate nodes of input buffer circuits to a common node, ensuring that all input buffer circuits experience the same potential conditions regardless of their physical distance from the selector. This eliminates the frequency characteristic variations caused by different line lengths, as each input buffer circuit operates under identical electrical conditions.
2Adaptability or versatility
If line length between input buffer circuits and selector is increased, then more input channels can be connected, but load on output terminal increases limiting receivable band
Solution Approach 1:
The patent introduces an intermediary common node that acts as a central collection point for current signals from all input buffer circuits. This common node serves as a mediator that aggregates signals before they reach the selector, allowing multiple input channels to be connected without increasing the load on individual output terminals, thereby maintaining the receivable band while supporting expanded channel capacity.
3Ease of operation
If separate connection lines are used for each input buffer circuit, then individual signal routing is improved, but parasitic line capacitance and resistance increase
Solution Approach 1:
The patent merges the connection paths by having all input buffer circuits connect to a common node rather than using separate lines to the selector. This consolidation reduces the total amount of wiring and associated parasitic capacitance and resistance, while the common node architecture still enables individual signal routing control through the selection mechanism.
Data Source
AI summary
An output circuit (12) converts a pair of current signals supplied to a pair of common nodes (NCa and NCb) into a pair of voltage signals (VOa and VOb). In each of input buffer circuits (11, 11, . . . ), a constant current generation section (101) generates, in an output mode, a pair of constant currents in a pair of current paths going from a pair of intermediate nodes (NMa and NMb) to a reference node (VDD1), and stops the generation of the pair of constant currents in a cutoff mode. A voltage-to-current conversion section (102) generates, in the output mode, a pair of input currents corresponding to a pair of input signals (Sa and Sb) in a pair of current paths going from the pair of intermediate nodes (NMa and NMb) to a reference node (GND) to thereby generate a pair of current signals (Ia and Ib) in a pair of current paths going from the pair of intermediate nodes (NMa and NMb) to the pair of common nodes (NCa and NCb), and stops the generation of the pair of input currents in the cutoff mode.