Reception Device Tap Coefficient Calibration via Voltage Control
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Solution Overview
Problem
In high-capacity memory systems, the longer and more complex transmission path between the memory device and the controller leads to significant insertion loss and reflection, making it difficult to receive data signals with high accuracy due to variations in tap coefficients caused by Process, Voltage, and Temperature (PVT) differences.
Innovation Solution
A reception device is configured with an equalizer circuit and a control circuit that adjusts the tap coefficient by using a reference voltage instead of the data signal during training, detecting the inverted tap coefficient at the boundary where the output value inverts, and setting it before receiving the data signal, ensuring accurate data reception.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If the tap coefficient of DFE is achieved by the mutual conductance (gm) of transistor, then the equalizer circuit can be implemented with standard transistor parameters, but the tap coefficient largely varies depending on PVT (Process, Voltage and Temperature) differences
Solution Approach 1:
The patent changes the controlling parameter of the tap coefficient from transistor mutual conductance (gm) to a controllable voltage signal. By using a voltage-controlled switch (e.g., MOS transistor operating in linear region) instead of relying on gm, the tap coefficient becomes adjustable via voltage without being dominated by PVT variations of the transistor's intrinsic parameters. This allows the tap coefficient to be set and stabilized independently of process, voltage, and temperature changes.
2Device complexity
If the tap coefficient is set in advance at the time of designing, then the design process is simplified, but the characteristic of the tap coefficient varies depending on the difference in PVT
Solution Approach 1:
The patent performs preliminary calibration of the tap coefficient before normal operation. During a training phase, the system applies known test patterns and adjusts the voltage controlling the tap coefficient to achieve the optimal value. This preliminary adjustment compensates for PVT variations, ensuring accurate tap coefficient characteristics during actual data reception without requiring complex real-time adjustment mechanisms.
Solution Approach 2:
The system incorporates feedback mechanisms during the training phase where the output of the DFE is monitored and used to adjust the tap coefficient voltage. By comparing the actual output with expected values and iteratively adjusting the controlling voltage, the system achieves precise tap coefficient settings that account for PVT variations, then maintains these settings during normal operation.
3Measurement precision
If a decision feedback equalizer (DFE) is used to reduce influence of insertion loss and reflection, then data signal reception accuracy is improved, but the system becomes more complex and sensitive to PVT variations
Solution Approach 1:
The patent simplifies the DFE implementation by changing how the tap coefficient is controlled - using a voltage-controlled switch instead of relying on transistor gm. This reduces the sensitivity to PVT variations and simplifies the circuit design while maintaining the equalization function. The voltage-controlled approach requires fewer components and less complex biasing circuits compared to gm-based implementations.
Data Source
AI summary
A reception device for receiving a data signal representing a data value 0 or 1. The reception device includes an equalizer circuit and a control circuit. The equalizer circuit outputs an output value representing a result obtained by comparing a voltage based on the received data signal and a first voltage as a reference, at each clock timing corresponding to the data signal. The control circuit is connected to the equalizer circuit. The control circuit changes, before the data signal is received, a tap coefficient related to a characteristic of the equalizer circuit in a state in which a second voltage different from the first voltage, instead of the voltage of the data signal, is supplied to the equalizer circuit, to detect an inverted tap coefficient that is the tap coefficient at a boundary where a data value of the output value is inverted. The control circuit sets the inverted tap coefficient to the equalizer circuit at a time of receiving the data signal.