Reception Circuit Mode Discrimination Using Data and Clock Blanking Signals
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Solution Overview
Problem
Existing communication systems, such as those based on the C-PHY and D-PHY specifications, face challenges in discriminating between multiple communication modes during blanking and data signal transmission periods, necessitating a method to easily distinguish these modes.
Innovation Solution
A reception device and transmission device are designed with a discrimination circuit that utilizes data and clock blanking signals to differentiate communication modes, and a blanking controller controls the signal values of data and clock blanking signals to facilitate mode discrimination.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If communication modes are discriminated using traditional methods (counters, complex circuits), then mode discrimination accuracy is improved, but device complexity and power consumption increase
Solution Approach 1:
The patent extracts the mode discrimination function from complex counting circuits and separates it into the reception device. The transmission device sends blanking signals that encode mode information, while the reception device contains a discrimination circuit that decodes these signals. This extraction eliminates the need for complex counters in both devices and concentrates the discrimination logic in one place, reducing overall system complexity while maintaining accurate mode discrimination.
Solution Approach 2:
The patent introduces blanking signals as an intermediary carrier for mode information. Instead of using complex handshaking protocols or multiple control lines, the mode information is embedded within the existing blanking period signals. The discrimination circuit at the reception end detects specific patterns in these blanking signals to determine the communication mode, providing a simple yet effective mediation mechanism that avoids complex circuitry.
2Measurement precision
If communication modes are discriminated using traditional methods (counters, complex circuits), then mode discrimination accuracy is improved, but power consumption increases
Solution Approach 1:
The patent extracts the power-intensive counting and discrimination operations from continuous operation and concentrates them in a dedicated discrimination circuit that only activates during blanking periods. This extraction allows the rest of the system to operate in lower-power modes during data transmission, while mode discrimination occurs intermittently using the existing blanking signal infrastructure, significantly reducing overall power consumption.
Solution Approach 2:
The patent enables the blanking signals to serve dual purposes: they maintain the timing synchronization function while simultaneously carrying mode discrimination information. This self-service approach means the same signal infrastructure used for clock synchronization also provides mode information, eliminating the need for separate high-power detection circuits and reducing total power consumption while maintaining accurate mode discrimination.
3Adaptability or versatility
If multiple communication modes are supported with discrimination capability, then adaptability is improved, but device complexity increases
Solution Approach 1:
The patent supports multiple communication modes by varying parameters within the existing blanking signal framework. Different modes are represented by different patterns, durations, or voltage levels of the blanking signals rather than requiring separate signal lines or protocols. The discrimination circuit detects these parameter variations to identify the active mode, enabling flexible multi-mode operation without proportionally increasing circuit complexity.
Data Source
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AI summary
There is provided a reception device including a data signal receiver circuit, a clock signal receiver circuit, and a discrimination circuit. The data signal receiver circuit receives a data signal through a data signal line, and receives a data blanking signal through the data signal line in a blanking period of the data signal. The clock signal receiver circuit receives a clock signal and a clock blanking signal through a clock signal line, the clock blanking signal outputted in synchronization with the blanking period of the data signal. The discrimination circuit discriminates communication modes on a basis of one or both of a signal value of the data blanking signal and a signal value of the clock blanking signal.