Recess Gate Fabrication Using Plasma Oxide Sidewall Protection
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Solution Overview
Problem
The existing methods for fabricating semiconductor devices with recess gates face challenges in controlling the critical dimensions of recesses, leading to issues like horn formation and seam creation, which deteriorate the refresh characteristics of semiconductor devices, especially as design rules become smaller and the profile of recesses becomes sharper.
Innovation Solution
A method involving the formation of a plasma oxide layer over the substrate to protect sidewalls during etching, allowing for controlled isotropic etching to create a bulb-type recess with a round profile, thereby preventing seam formation and improving thickness controllability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a typical recess gate process is used to increase channel length, then refresh characteristics are improved, but the profile of the recess bottom becomes sharp with small critical dimension, leading to horn formation and leakage current
Solution Approach 1:
The recess formation process is divided into two distinct stages: first forming a preliminary recess with vertical sidewalls, then forming a bulb-type recess with rounded bottom profile. This segmentation allows each stage to optimize for its specific function, preventing horn formation while maintaining manufacturing control.
Solution Approach 2:
A passivation layer is formed on the sidewalls of the preliminary recess before forming the bulb-type recess. This preliminary protective action prevents etching of the sidewalls during the second etching process, ensuring clean separation between the two recess formation stages and preventing horn formation.
2Ease of manufacture
If thermal oxide layer is used as passivation layer to protect sidewalls, then sidewall protection is achieved, but process time exceeds 5 hours and thickness control becomes difficult
Solution Approach 1:
The passivation layer material is changed from thermal oxide to plasma oxide. This parameter change reduces the formation time from over 5 hours to approximately 30 minutes while maintaining adequate protective function. The plasma oxide layer thickness is controlled to be 50-200 nm, providing sufficient protection without excessive thickness.
3Ease of manufacture
If thermal oxide layer is used as passivation layer, then sidewall protection is provided, but thickness uniformity is poor with thicker layer on bottom portion, preventing proper second recess formation
Solution Approach 1:
The passivation layer formation method is changed from thermal oxidation to plasma oxidation. This parameter change produces a more uniform thickness distribution, with the plasma oxide layer being 50-200 nm thick on sidewalls and not excessively thick on the bottom, enabling proper etching of the second recess.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the controllability of recess dimensions, reduces the formation of horns and seams, and improves the refresh characteristics of semiconductor devices by ensuring uniformity and reducing processing time, applicable to DRAM devices of 50 nm and below.
Implementation Method 1
forming a plasma oxide layer over the substrate including the first recess
Implementation Method 2
partially etching the plasma oxide layer to leave a portion of the plasma oxide layer on sidewalls of the first recess
Implementation Method 3
forming a second recess by isotropically etching a bottom portion of the first recess
Data Source
AI summary
A method for fabricating a semiconductor device includes forming a first recess in a substrate, forming a plasma oxide layer over the substrate including first recess, etching the plasma oxide layer to have a portion of the plasma oxide layer remain on sidewalls of the first recess, and forming a second recess by isotropically etching a bottom portion of the first recess, wherein the second recess has a width greater than a width of the first recess.