Recessed Active Edge Gate Extension for Semiconductor Punch-Through
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Solution Overview
Problem
Conventional semiconductor devices face challenges in minimizing channel length while maintaining high integration density due to issues like punch-through and increased contact resistance, which are exacerbated by gate electrode protrusions that require significant space and hinder integration.
Innovation Solution
A semiconductor device with a recessed active edge and a gate extension in the recessed region under the gate electrode, which extends the channel length without occupying additional space, allowing for higher integration density and reduced contact resistance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If the channel length is reduced to increase driving current and response speed, then the driving current and response speed improve, but punch-through occurs which reduces driving current
Solution Approach 1:
The patent introduces a recessed active edge that extends vertically into the substrate, creating a third-dimensional structure. This recessed region increases the effective channel length in the vertical dimension while maintaining a short horizontal channel length, thereby preventing punch-through while preserving high-speed performance.
Solution Approach 2:
The gate electrode is positioned to extend over the recessed active edge, creating a nested configuration where the gate wraps around the recessed region. This nested structure effectively lengthens the channel path without increasing the planar footprint, solving the punch-through problem while maintaining compact device dimensions.
2Reliability
If gate electrode protrusions are formed to extend effective channel length, then punch-through is prevented, but significant space is occupied which hinders integration density
Solution Approach 1:
Instead of extending the gate electrode horizontally (2D approach), the patent creates a vertical recess in the active edge (3D approach). This allows the channel length to be extended in the vertical dimension while keeping the horizontal footprint minimal, thereby preventing punch-through without sacrificing integration density.
Solution Approach 2:
The recessed active edge is formed only at specific locations where punch-through is most likely to occur, rather than uniformly across the entire device. This localized modification extends the channel length precisely where needed to prevent punch-through, while minimizing the overall space requirement and maintaining high integration density.
3Reliability
If conventional structures are used to maintain channel length, then punch-through is prevented, but contact resistance increases and integration density decreases
Solution Approach 1:
The gate electrode extends into and over the recessed active edge, creating a nested configuration. This nested structure provides multiple contact points and larger contact area between the gate and the active region, thereby reducing contact resistance while simultaneously preventing punch-through through the extended channel length.
Data Source
AI summary
A semiconductor device having a recessed active edge is provided. The semiconductor devices include an isolation layer disposed in a substrate to define an active region. A gate electrode is disposed to cross over the active region. A source region and a drain region are disposed in the active region on both sides of the gate electrode. A recessed region is disposed under the gate electrode and on an edge of the active region adjacent to the isolation layer. A bottom of the recessed region may be sloped down toward the isolation layer. The gate electrode may further extend into and fill the recessed region. That is, a gate extension may be disposed in the recessed region. A method of fabricating the semiconductor device is also provided.