Recessed Active Region for Drive Current
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Solution Overview
Problem
Vertical FinFET transistors face limitations due to high source/drain extension resistances and complex manufacturing processes, particularly in sub 0.25 μm CMOS generations, where electrical behavior is influenced by shallow trench isolation corner profiles and manufacturing processes.
Innovation Solution
A method of forming a MOS device with increased channel width by recessing the active region between isolation structures with tilt angles less than 90 degrees, followed by an optional surface recovery process, which includes annealing, oxidation, and wet etching, to enhance channel width and reduce stress without increasing layout area.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If vertical FinFET structures are used to increase channel width, then device drive current is improved, but source/drain extension resistances increase and manufacturing complexity increases
Solution Approach 1:
Instead of increasing channel width by moving to vertical FinFET structures, the patent inverts the approach by recessing the active region downward to expose more channel width at the surface level. This maintains planar device simplicity while achieving increased effective channel width for higher drive current
Solution Approach 2:
The patent transitions from horizontal channel width expansion (FinFET sidewalls) to vertical dimension utilization by recessing the active region. This creates additional channel width exposure in the vertical dimension while maintaining planar manufacturing processes
2Productivity
If active region is recessed to increase channel width, then drive current is improved, but surface stress and potential device reliability issues worsen
Solution Approach 1:
The patent converts the potentially harmful surface stress and damage from recessing into a benefit by performing surface recovery processes. The recessing creates surface damage that, when properly recovered through annealing and oxidation, results in improved device performance and reliability
Solution Approach 2:
The patent changes the physical and chemical parameters of the recessed active region surface through controlled annealing temperature, oxidation conditions, and wet etching parameters. These parameter changes transform the damaged surface into a recovered surface with improved electrical characteristics
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach improves drive current without increasing layout area, offering a solution for the limitations of vertical devices by increasing channel width and reducing leakage current, particularly beneficial for future generations of MOS devices with narrower widths.
Implementation Method 1
The surface recovery process preferably includes an annealing and/or an oxidation and a wet etching
Implementation Method 2
The surface recovery process preferably includes an annealing and/or an oxidation and a wet etching
Data Source
AI summary
A semiconductor structure having a recessed active region and a method for forming the same are provided. The semiconductor structure comprises a first and a second isolation structure having an active region therebetween. The first and second isolation structures have sidewalls with a tilt angle of substantially less than 90 degrees. The active region is recessed. By recessing the active region, the channel width is increased and device drive current is improved.