Semiconductor Package Substrate With Recessed Fine-Pitch Bond Fingers
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Solution Overview
Problem
Existing semiconductor packages face challenges in achieving finer pitches for bond fingers due to the formation of protruding patterns or pads with wider pitches, which limits the density and miniaturization of electronic products.
Innovation Solution
A semiconductor package design that includes a package substrate with embedded circuit patterns and recesses, where upper circuit wirings are partially exposed and covered by plating patterns acting as bond fingers, allowing for a finer pitch through laser processing and metal plating.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If protruding patterns or pads are formed on circuit patterns to electrically connect components, then electrical connection is achieved, but the pitch becomes wider than the circuit pattern pitch
Solution Approach 1:
The invention extracts the protruding pattern formation step entirely. Instead of forming separate protruding pads, the circuit patterns themselves are exposed through recesses in the insulating layer and directly serve as bond fingers, eliminating the pitch increase associated with protruding pattern formation
Solution Approach 2:
The invention transitions from a planar structure to a three-dimensional structure by forming recesses in the insulating layer. This vertical dimension allows the bond fingers to be exposed at different levels, enabling finer pitch while maintaining electrical connection reliability
2Quantity of substance
If the ETS is required to have a finer pitch to increase density, then the density of electronic product increases, but the manufacturing complexity increases
Solution Approach 1:
The invention merges the circuit pattern layer with the bond finger function. The same conductive patterns that provide electrical connectivity also serve as bond fingers for component mounting, eliminating the need for separate protruding pad structures and simplifying the manufacturing process while achieving finer pitch
Solution Approach 2:
The circuit patterns are pre-formed on the insulating layer before component mounting. The recesses are then formed to expose these pre-existing patterns, allowing the bond fingers to be ready in advance with finer pitch without requiring additional complex manufacturing steps
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The design enables bond fingers with a finer pitch, enhancing the density and miniaturization of electronic products while providing improved wire bonding strength and compatibility with both flip-chip and wire bonding chips.
Implementation Method 1
A laser beam may be irradiated to remove a portion of an insulating layer 200
Implementation Method 2
a metal plating process is performed to form plating patterns on the exposed portions of the plurality of pad patterns
Data Source
AI summary
A semiconductor package includes a package substrate having bond fingers, at least one semiconductor chip on the package substrate, the at least one semiconductor chip having chip pads on an upper surface thereof, and conductive wires electrically connecting the chip pads and the bond fingers, wherein the package substrate includes an insulating layer having an upper surface and a lower surface opposite the upper surface, the insulating layer having a recess of a predetermined depth from the upper surface of the insulating layer, upper circuit wirings having pad patterns in the insulating layer and extending such that at least a portion of each of the pad patterns is exposed from a bottom surface of the recess, and a respective plating pattern on the portion of each of the pad patterns that is exposed, the respective plating pattern provided as the bond finger.