Recessed Bump Self-Alignment for Flip-Chip Lateral Displacement
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Solution Overview
Problem
Existing semiconductor bonding techniques require additional alignment structures on chips and circuit boards, complicating fabrication processes and increasing the risk of joint defects due to displacement issues during bonding.
Innovation Solution
A semiconductor device with a multilayer chip configuration where the first semiconductor chip has a recessed bump and a hollow cylindrical electrode pad, allowing self-alignment during bonding, reducing sliding and lateral displacement without increasing the number of fabrication processes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If additional alignment structures (projecting stud bumps and recessed guide holes) are formed on chips and circuit boards to improve positioning accuracy, then manufacturing precision is improved, but device complexity and fabrication process complexity increase
Solution Approach 1:
The patent combines the alignment function with the existing bump structure by forming the bump with a recessed portion. This integrates the positioning function into the electrical connection structure itself, eliminating the need for separate alignment features and reducing overall device complexity while maintaining positioning accuracy
Solution Approach 2:
The bump structure serves dual purposes: providing electrical connection and providing alignment functionality through its recessed portion. This multi-functional design eliminates the need for dedicated alignment structures, reducing fabrication process complexity while achieving accurate positioning
2Reliability
If additional alignment structures are formed to reduce lateral displacement during bonding, then reliability is improved, but manufacturing precision deteriorates due to increased risk of joint defects
Solution Approach 1:
By merging the alignment function into the bump structure itself, the patent eliminates the interface between separate alignment structures and bonding surfaces, thereby reducing potential sources of joint defects while improving bonding reliability through better positioning stability
Solution Approach 2:
The recessed bump structure performs self-alignment during bonding, where the bump automatically positions itself relative to the electrode pad through the recessed portion engagement. This self-aligning mechanism reduces lateral displacement and improves both reliability and manufacturing precision by minimizing positioning errors
3Device complexity
If the pitch of bumps is increased to reduce the number of bumps, then device complexity is reduced, but manufacturing precision deteriorates because the margin for displacement decreases
Solution Approach 1:
The recessed bump structure provides self-alignment capability that compensates for the reduced positioning margin inherent in larger bump pitches. The recessed portion engages with the electrode pad to automatically correct minor misalignments, maintaining manufacturing precision even when bumps are spaced farther apart
Data Source
AI summary
A semiconductor device includes multilayer chips in which a first semiconductor chip and a second semiconductor chip are bonded together. A first electrode pad is formed on a principal surface of the first semiconductor chip, and a first bump is formed on the first electrode pad. A second bump is formed on the principal surface of the second semiconductor chip such that the second bump is bonded to the first bump. The first electrode pad has an opening, and the opening and an entire peripheral portion of the opening form a stepped shape form a stepped shape. The first bump has a recessed shape that is recessed at a center thereof and covers the stepped shape.