Recessed Dielectric Profile for Non-Volatile Memory Coupling
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Current non-volatile memory devices face limitations in electrical performance, necessitating improvements in coupling ratios between control gates and charge storage layers to enhance operational efficiency.
Innovation Solution
A non-volatile memory structure featuring a substrate with charge storage layers, a recessed dielectric layer, and a control gate that fills the opening between adjacent charge storage layers, optimizing the coupling ratio through a specific manufacturing process involving multiple deposition and etching steps to create a recessed profile for the dielectric layer and control gate.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a conventional planar dielectric layer is used between charge storage layers, then the manufacturing process is simple, but the coupling ratio between control gate and charge storage layers is insufficient
Solution Approach 1:
The dielectric layer is formed with a recessed bottom surface profile that curves downward between adjacent charge storage layers, creating a concave shape. This curvature allows the control gate to be positioned closer to the charge storage layers in the regions between them, thereby enhancing the coupling ratio without complicating the overall device structure
Solution Approach 2:
The dielectric layer transitions from a conventional two-dimensional planar structure to a three-dimensional recessed structure. By introducing vertical depth variation through the recessed profile, the control gate achieves improved electrical coupling with charge storage layers while maintaining manufacturing feasibility through standard deposition and etching processes
2Reliability
If the control gate is positioned farther from charge storage layers for isolation, then adjacent memory cells are better isolated, but the coupling ratio and electrical performance deteriorate
Solution Approach 1:
The dielectric layer exhibits spatially varying thickness with a recessed profile that creates locally different electrical characteristics. In regions between charge storage layers, the recessed profile allows closer control gate positioning for high coupling, while the dielectric material maintains electrical isolation properties, thus achieving both performance and isolation requirements through local structural optimization
Data Source
AI summary
A non-volatile memory structure including a substrate, a plurality of charge storage layers, a first dielectric layer, and a control gate is provided. The charge storage layers are located on the substrate. An opening is provided between two adjacent charge storage layers. The first dielectric layer is located on the charge storage layers and on a surface of the opening. A bottom cross-sectional profile of the first dielectric layer located in the opening is a profile that is recessed on both sides. The control gate is located on the first dielectric layer and fills the opening.