Recessed Electronic Fuses in Replacement Gate CMOS

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Solution Overview

Problem

In complex integrated circuits, the shrinking feature sizes of transistors lead to challenges in maintaining reliable electronic fuses and passive circuit elements, such as resistors and capacitors, due to increased leakage currents and the need for precise resistance values, while also requiring adjustments to avoid operational instabilities and signal propagation delays.

Innovation Solution

The formation of electronic fuses using semiconductor materials like silicon and metal/semiconductor compounds, combined with high-k metal gate electrode structures, allows for the preservation of semiconductor material during the replacement gate process, using recessed surface topography and metal silicide as a planarization stop material to maintain compatibility with conventional approaches and reduce patterning complexities.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If transistor feature sizes are reduced to improve switching speed and packing density, then device performance and functionality are enhanced, but leakage currents increase and reliable operation becomes difficult to maintain

Engineering Contradiction:
Improveswitching speedVSAvoidoperational reliability
Core Design Contradiction:
SpeedVSReliability

Solution Approach 1:

The patent changes the material parameter of the gate electrode from conventional polysilicon to metal-containing materials (such as tungsten, titanium nitride, or cobalt), which fundamentally alters the electrical characteristics and reduces leakage currents in scaled transistors while maintaining high switching speed performance

Inventive Principle:
Principle #35Parameter changes

2Adaptability or versatility

If electronic fuses are provided in complex integrated circuits to enable circuit adaptation, then circuit flexibility and adaptability are improved, but the size of passive circuit elements must be adjusted which consumes valuable chip area

Engineering Contradiction:
Improvecircuit adaptabilityVSAvoidchip area
Core Design Contradiction:
Adaptability or versatilityVSArea of stationary object

Solution Approach 1:

The patent merges the electronic fuse structure with the high-k metal gate electrode structure, allowing the fuse to share the same metal gate material and underlying semiconductor region. This integration eliminates the need for separate fuse structures and reduces the overall chip area required for passive circuit elements while maintaining circuit adaptability

Inventive Principle:
Principle #5Merging (Combining)

3Reliability

If metal gate electrode structures are formed by replacement gate approach to reduce leakage currents, then device performance is improved, but the process complexity increases due to additional manufacturing steps

Engineering Contradiction:
Improveleakage current controlVSAvoidmanufacturing process complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent performs preliminary formation of the metal gate electrode structure before transistor operation, using a replacement gate approach where the metal gate is deposited and patterned in advance. This preliminary action allows subsequent manufacturing steps to proceed with simplified processes while maintaining the low-leakage benefits of metal gate structures

Inventive Principle:
Principle #10Preliminary action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This method enables the creation of sophisticated semiconductor devices with reliable electronic fuses and high-k metal gate electrode structures, reducing leakage currents and maintaining precise resistance values, thus enhancing the overall performance and adaptability of integrated circuits without significant redesign or increased chip area consumption.

Implementation Method 1

using recessed surface topography and metal silicide as a planarization stop material to maintain compatibility with conventional approaches

Methodology Applied
Scientific EffectPlanarization stop material effect:

Implementation Method 2

formation of electronic fuses using semiconductor materials like silicon and metal/semiconductor compounds, combined with high-k metal gate electrode structures

Methodology Applied
Scientific EffectHigh-k dielectric effect: Dielectric Permittivity

Data Source

PatentUS8497554B2Semiconductor device comprising metal gate structures formed by a replacement gate approach and efuses including a silicide
Publication Date: 2013.07.30 GLOBALFOUNDRIES US INC
  • US8497554B2 patent drawing
  • US8497554B2 patent drawing
  • US8497554B2 patent drawing

AI summary

In a replacement gate approach for forming high-k metal gate electrode structures, electronic fuses may be provided on the basis of a semiconductor material in combination with a metal silicide by using a recessed surface topography and/or a superior selectivity of the metal silicide material during the replacement gate process. For example, in some illustrative embodiments, electronic fuses may be provided in a recessed portion of an isolation region, thereby avoiding the removal of the semiconductor material when replacing the semiconductor material of the gate electrode structures with a metal-containing electrode material. Consequently, the concept of well-established semiconductor-based electronic fuses may be applied together with sophisticated replacement gate structures of transistors.