Recessed Field Plate HEMT Layout for Bias-Stable Linearity
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Solution Overview
Problem
High power and high frequency applications require semiconductor materials with larger bandgaps and higher breakdown voltages than silicon and gallium arsenide, leading to challenges in transistor performance due to electron trapping and capacitance issues in GaN-based HEMTs, particularly at class C operation and high drain bias conditions.
Innovation Solution
A dual-gate transistor structure with a second stage gate separated by a thin spacer layer, allowing grounding and eliminating the need for separate DC biasing, and a field plate placement that reduces the distance to semiconductor layers to enhance linearity and reduce feedback capacitance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If a field plate is placed close to the semiconductor layers to reduce feedback capacitance, then feedback capacitance is reduced, but the risk of electrical breakdown and electron trapping increases due to high electric fields
Solution Approach 1:
An insulating layer is introduced between the field plate and the semiconductor layers to act as an intermediary. This mediator allows the field plate to be positioned close to the semiconductor layers for reduced feedback capacitance while preventing direct electrical contact that would cause breakdown. The insulating layer thus enables the field plate to function at optimal proximity without compromising device reliability.
Solution Approach 2:
The electric field distribution is modified by changing the physical parameters of the structure - specifically by introducing the insulating layer with different dielectric properties. This parameter change allows the field plate to operate at closer proximity to semiconductor layers, reducing feedback capacitance while the insulating layer's dielectric strength prevents electrical breakdown despite the intensified electric field in the narrowed gap.
2Device complexity
If a dual-gate structure with thin spacer layer is used to eliminate separate DC biasing, then device complexity and cost are reduced, but manufacturing precision requirements increase
Solution Approach 1:
The thin spacer layer automatically provides the necessary electrical isolation between the two gates, eliminating the need for separate DC biasing circuits. The spacer layer's inherent insulating properties enable the device to self-regulate the electrical connection between gates, reducing external biasing complexity while the precise thickness control during manufacturing ensures reliable electrical isolation.
3Power
If wide bandgap materials like GaN are used for high power and high frequency applications, then breakdown voltage and electron saturation velocity are improved, but electron trapping effects become more significant
Solution Approach 1:
The insulating layer serves as a mediator that prevents electrons from being trapped at the interface between the field plate and semiconductor layers. By introducing this intermediate layer, the harmful electron trapping effect is eliminated while the wide bandgap material's high breakdown voltage capability is preserved. The insulating layer blocks the formation of trap states at the critical interface region.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution achieves lower feedback capacitance, improved linearity, and reduced complexity and cost, enabling high voltage, high current, and high gain operation in GaN-based HEMTs.
Implementation Method 1
The field plate is separated from a gate by a first insulating layer and is separated from the barrier layer by a non-zero distance
Implementation Method 2
Field plates have been used to enhance the performance of GaN-based HEMTs at microwave frequencies and have exhibited performance improvement over non-field-plated devices
Implementation Method 3
A two-dimensional electron gas (2DEG) may be formed at the heterojunction of two semiconductor materials with different bandgap energies. The 2DEG is an accumulation layer in the undoped smaller bandgap material and can contain a relatively high sheet electron concentration. Major portion of the electrons in the 2DEG may be attributed to polarization in the AlGaN.
Data Source
Figure 1A~1B
Figure 1C~3
Figure 4~6
AI summary
A transistor device including a field plate is described. One embodiment of such a device includes a field plate separated from a semiconductor layer by a thin spacer layer. In one embodiment, the thickness of spacer layer separating the field plate from the semiconductor layers is less than the thickness of spacer layer separating the field plate from the gate. In another embodiment, the non- zero distance separating the field plate from the semiconductor layers is about 1500A or less. Devices according to the present invention can show capacitances which are less drain bias dependent, resulting in improved linearity.