Display Device Recessed Gate Conductors and Common Electrodes
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Solution Overview
Problem
The manufacturing process of display devices involves multiple exposure processes and photo-masks, leading to increased complexity and cost, as well as potential display failures due to unnecessary semiconductor layers.
Innovation Solution
A display device design that reduces the number of exposure processes and photo-masks by forming recessed gate conductors and common electrodes, with semiconductor layers aligned to prevent overlap and minimize unnecessary semiconductor formation, and a manufacturing method that uses sequential mask patterns to etch semiconductor and gate insulating layers, allowing for undercut gate conductors and air gaps to simplify the process.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If multiple exposure processes and photo-masks are used to form precise patterns of gate conductors, semiconductor layers, and common electrodes, then manufacturing precision is improved, but device complexity and manufacturing cost increase
Solution Approach 1:
The patent merges the formation of gate conductors and common electrodes into a single patterning process. By designing the gate conductor pattern and common electrode pattern to be formed simultaneously through one exposure process, the number of photo-masks and exposure steps is reduced, thereby simplifying the manufacturing process while maintaining the required pattern precision for both components
Solution Approach 2:
The patent employs a universal patterning approach where a single exposure process serves multiple functions: defining gate conductor locations, defining common electrode locations, and establishing the spatial relationships between semiconductor layers and conductive elements. This multi-functional patterning step reduces overall process complexity while achieving precise positioning
2Reliability
If semiconductor layers are formed extensively to ensure complete coverage, then reliability is improved, but unnecessary semiconductor layers cause display failures
Solution Approach 1:
The patent applies local quality by forming semiconductor layers only in specific locations where they are functionally required. The semiconductor layers are positioned precisely between gate conductors and data lines, and are excluded from areas where they would create harmful effects such as short circuits or display failures. This localized semiconductor formation ensures reliability while avoiding the harmful effects of unnecessary semiconductor material
3Manufacturing precision
If gate conductors and common electrodes are formed with precise edge alignment, then manufacturing precision is improved, but the number of exposure processes and photo-masks increases
Solution Approach 1:
The patent combines the patterning of gate conductors and common electrodes into a single exposure process. By designing the photomask and exposure conditions to simultaneously define both gate conductor edges and common electrode edges with precise alignment, the number of separate exposure processes is reduced while maintaining the required edge alignment precision
Data Source
AI summary
The present inventive concept relates to a display device and a manufacturing method thereof. A display device according to an exemplary embodiment of the present inventive concept includes: a substrate; a first gate conductor provided on the substrate; and a gate insulator provided on the first gate conductors, wherein edges of the first gate conductor are recessed from edges of the first gate insulator, and the edges of the first gate insulator are respectively parallel with the edges of the first gate conductor.