Recessed Access Gate Insulator Structure for Lower GIDL

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Solution Overview

Problem

Recessed access devices in semiconductor materials face challenges in achieving high on-current and low off-current, particularly due to gate-induced-drain-leakage (GIDL) issues, which affect the conductivity and efficiency of the devices.

Innovation Solution

The use of a gate insulator comprising both low-k and high-k materials, where the low-k material extends completely along the sidewalls and under the conductive gate, and the high-k material is laterally inward, reducing GIDL and enabling an all-metal gate construction, thereby enhancing conductivity.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a conventional gate insulator structure is used, then the device structure is simple, but gate-induced-drain-leakage increases and on-current decreases

Engineering Contradiction:
Improveon-currentVSAvoidgate insulator structure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The gate insulator is segmented into two distinct materials: a low-k material forming the first portion and a high-k material forming the second portion. This segmentation allows each material to perform its specialized function - the low-k material provides mechanical support and stress control while the high-k material provides superior gate control and reduces GIDL, thereby increasing on-current without excessive complexity

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The gate insulator employs a composite structure combining low-k and high-k materials. The low-k material (such as silicon dioxide) provides a stable base layer with appropriate dielectric properties, while the high-k material (such as hafnium oxide) adds enhanced gate control capability and reduces drain leakage, achieving superior overall performance

Inventive Principle:
Principle #40Composite materials

2Reliability

If the low-k material extends completely along sidewalls and under the gate, then GIDL is reduced, but manufacturing precision requirements increase

Engineering Contradiction:
Improveoff-currentVSAvoidlow-k material positioning
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The low-k material is deposited first to form the first portion of the gate insulator, completely lining the trench sidewalls and extending under the gate before the high-k material is added. This preliminary action ensures proper stress distribution and GIDL reduction, while the subsequent high-k material deposition is controlled to form only the second portion, managing the precision requirements through sequential processing

Inventive Principle:
Principle #10Preliminary action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration reduces gate-induced-drain-leakage, allowing for higher on-current and lower off-current in recessed access devices, improving their overall performance and efficiency.

Implementation Method 1

a low-k gate-insulator material that is characterized by a dielectric constant, k, of no greater than 4.0

Methodology Applied
Scientific EffectDielectric insulation: Dielectric

Implementation Method 2

a high-k gate-insulator material that is characterized by a dielectric constant, k, of greater than 4.0

Methodology Applied
Scientific EffectHigh dielectric constant insulation: Dielectric

Data Source

PatentUS11929411B2Recessed access devices and methods of forming a recessed access devices
Publication Date: 2024.03.12 MICRON TECHNOLOGY INC
  • US11929411B2 patent drawing
  • US11929411B2 patent drawing
  • US11929411B2 patent drawing

AI summary

A method of forming a recessed access device comprises forming a trench in semiconductor material. Sidewalls and a bottom of the trench are lined with low-k gate-insulator material. The low-k gate-insulator material is characterized by its dielectric constant k being no greater than 4.0. Sacrificial material is formed in a bottom portion of the trench over the low-k gate-insulator material and over the trench bottom. A high-k gate-insulator material is formed in an upper portion of the trench above the sacrificial material and laterally-inward of the low-k gate-insulator material that is in the upper portion of the trench. The high-k gate-insulator material is characterized by its dielectric constant k being greater than 4.0. The sacrificial material is replaced with a conductive gate that has its top above a bottom of the high-k gate-insulator material. A pair of source/drain regions is formed in upper portions of the semiconductor material on opposing lateral sides of the trench. A channel region is in the semiconductor material below the pair of source/drain regions and extends along the trench sidewalls and around the trench bottom. Other embodiments, including structure independent of method, are disclosed.