Recessed Gate Oxide Structure to Prevent Corner Thinning

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Solution Overview

Problem

High-voltage transistors face a corner thinning problem in recessed gate oxide layers, leading to reduced gate breakdown voltage and an undesirable 'double hump' in the drain current versus gate voltage curve.

Innovation Solution

A gate oxide layer is formed using a combination of thermal oxide and high temperature oxide layers, with the high temperature oxide layer forming a rim extending out of the recess, thereby reducing corner thinning and enhancing oxide quality.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Strength

If a recessed gate oxide layer is formed in high-voltage transistors, then the gate breakdown voltage is improved, but corner thinning occurs leading to reduced reliability

Engineering Contradiction:
Improvegate breakdown voltageVSAvoidcorner thinning
Core Design Contradiction:
StrengthVSReliability

Solution Approach 1:

The gate oxide layer is segmented into two distinct layers: a first gate oxide layer formed in the recess and a second gate oxide layer formed over the first layer. This segmentation allows each layer to serve different functions - the first layer provides the necessary thickness for high breakdown voltage in the recess area, while the second layer caps the structure to prevent corner thinning and ensure uniform electrical characteristics across the gate.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different regions of the gate oxide structure are given different qualities through the two-layer approach. The first gate oxide layer in the recess has optimized thickness for high-voltage breakdown performance, while the second gate oxide layer provides uniform coverage and protection at the corners and edges, creating local quality optimization throughout the structure.

Inventive Principle:
Principle #3Local quality

2Reliability

If thermal oxide is used for gate oxide layer, then oxide quality is improved, but corner thinning problem persists in recessed structures

Engineering Contradiction:
Improveoxide qualityVSAvoidcorner thinning
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The oxide formation process is segmented into two sequential thermal oxidation steps, creating two distinct oxide layers. The first thermal oxidation forms the first gate oxide layer in the recess with high quality, and the second thermal oxidation forms the second gate oxide layer over the entire surface, including corners, thereby eliminating corner thinning while maintaining overall oxide quality.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The first gate oxide layer is formed as a preliminary structure in the recess before the second gate oxide layer is formed. This preliminary action establishes the foundation for high breakdown voltage while the subsequent second layer is added to prevent corner thinning, ensuring both oxide quality and manufacturing precision are achieved.

Inventive Principle:
Principle #10Preliminary action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution effectively prevents corner thinning, eliminates the 'double hump' phenomenon, and achieves a high breakdown voltage of at least 8 volts, improving the overall integrity and performance of the high-voltage transistor.

Implementation Method 1

Exposed surfaces of the recess are then thermally oxidized to form a thermal oxide layer of the gate oxide layer

Methodology Applied
Scientific EffectThermal oxidation: Oxidation

Implementation Method 2

Chemical vapor deposition is then performed upon the thermal oxide layer to form a high temperature oxide layer of the gate oxide layer upon the exposed surfaces of the thermal oxide layer

Methodology Applied
Scientific EffectChemical vapor deposition: Chemical Vapour Deposition

Data Source

PatentUS20250089324A1Methods for forming gate oxide layer for high-voltage transistor
Publication Date: 2025.03.13 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US20250089324A1 patent drawing
  • US20250089324A1 patent drawing
  • US20250089324A1 patent drawing

AI summary

A gate oxide layer for a high voltage transistor is formed using methods that avoid thinning in the corners of the gate oxide layer. A recess is formed in a silicon substrate. The exposed surfaces of the recess are thermally oxidized to form a thermal oxide layer of the gate oxide layer. A high temperature oxide layer of the gate oxide layer is then formed within the exposed surfaces of the recess by chemical vapor deposition. The combination of the thermal oxide layer and the high temperature oxide layer results in a gate oxide layer that does not exhibit the double hump phenomenon in the drain current vs. gate voltage curve. The high temperature oxide layer may include a rim that extends out of the recess.