Recessed Gate Structure for Stable Threshold Voltage in Transistors
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Solution Overview
Problem
Transistor devices with shallow trench isolation structures face a 'corner effect' issue due to non-uniform doping concentrations at the interface region, leading to a double-hump drain current versus gate voltage (IDVG) curve, which reduces device threshold voltage and increases noise.
Innovation Solution
A recessed gate structure is implemented with recess regions on either side of the interface region, cutting off the channel at the interface, thereby disabling the corner device and reducing the double-hump IDVG curve problem, achieved through an improved gate layout without additional masking processes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If a conventional gate structure is used, then the device can be manufactured with standard processes, but the corner effect causes non-uniform doping concentrations and double-hump IDVG curves
Solution Approach 1:
The gate structure is segmented by introducing recess regions that divide the gate into distinct sections. This segmentation allows the gate to selectively cover or expose different portions of the channel region, enabling precise control over doping concentration distribution and eliminating the corner effect by preventing harmful doping at interface regions.
Solution Approach 2:
The recessed gate structure implements local quality by creating different gate configurations at different locations. The gate is present over the central region of the channel to enable proper transistor operation, while recess regions are created at the interfaces to prevent corner effects. This localized structural variation optimizes performance at each specific location without requiring complete redesign of the entire device.
2Reliability
If the gate structure is modified to reduce corner effect, then device threshold voltage stability improves, but manufacturing process complexity increases
Solution Approach 1:
The recessed gate structure is formed as a preliminary feature before final doping and device completion steps. By pre-defining the gate geometry with recess regions, the structure is prepared in advance to control doping distribution and prevent corner effects during subsequent processing, ensuring threshold voltage stability without requiring complex post-processing adjustments.
3Manufacturing precision
If additional masking processes are used to create recessed gate, then precise channel control is achieved, but manufacturing complexity and cost increase
Solution Approach 1:
The formation of recess regions is merged with existing gate fabrication steps rather than being implemented as a separate, additional process. The recessed gate structure is integrated into the standard gate formation flow, combining multiple functions (gate patterning, recess creation, and channel definition) into a unified process sequence, thereby achieving precise channel control without proportionally increasing manufacturing complexity.
Data Source
AI summary
A method to form a transistor device with a recessed gate structure is provided. In one embodiment, a gate structure is formed overlying a device region and an isolation structure. The gate structure separates a device doping well along a first direction with a pair of recess regions disposed on opposite sides of the device region in a second direction perpendicular to the first direction. A pair of source/drain regions in is formed the device region on opposite sides of the gate structure. A sidewall spacer is formed extending along sidewalls of the gate structure, where a top surface of the sidewall spacer is substantially flush with the top surface of the gate structure. A resistive protection layer is then formed on the sidewall spacer and covering the pair of recess regions.