Recessed Gate Transistors for Image Sensor Noise Reduction

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Solution Overview

Problem

Current semiconductor devices face challenges in achieving high-speed operation and maintaining low noise characteristics, particularly in image sensors, due to limitations in transconductance and random telegraph signal (RTS) noise, which affect the sensitivity and performance of image sensors.

Innovation Solution

The semiconductor device incorporates a substrate with recesses and gate electrodes arranged in specific configurations to enhance transconductance and reduce RTS noise, featuring parallel-connected transistors and recessed gate electrodes to increase channel lengths and reduce noise characteristics, while also simplifying the interconnect structure for improved reliability.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional transistor structures are used, then device complexity is low, but transconductance is insufficient and RTS noise is high

Engineering Contradiction:
ImprovetransconductanceVSAvoidtransistor structure complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The drive transistor is divided into multiple parallel-connected transistors (first drive transistor and second drive transistor), each with its own gate electrode and channel region. This segmentation increases the total transconductance while distributing the function across multiple units, thereby improving reliability without excessive complexity

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Gate electrodes are formed extending in the second direction (width direction) rather than only in the first direction (length direction). This dimensional change allows increasing the gate width to enhance transconductance while maintaining acceptable channel length for RTS noise control

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Reliability

If multiple gate electrodes are added to increase transconductance, then transconductance increases, but device complexity increases

Engineering Contradiction:
ImprovetransconductanceVSAvoidgate electrode configuration
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

Multiple gate electrodes serve dual functions: they individually control their respective channel regions to provide high transconductance, and collectively form the complete drive transistor structure. This multi-functionality increases transconductance while managing complexity through unified control

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Reliability

If parallel-connected transistors are used to increase transconductance, then transconductance increases, but interconnect structure becomes complex

Engineering Contradiction:
ImprovetransconductanceVSAvoidinterconnect structure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

Source/drain regions are merged between parallel-connected transistors to serve as shared connections. This merging reduces the number of separate interconnect structures needed while maintaining the parallel configuration for high transconductance

Inventive Principle:
Principle #5Merging (Combining)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration enhances the transconductance of the drive transistor, leading to improved high-speed operation and maintains low RTS noise, thereby increasing the sensitivity and reliability of the image sensor.

Implementation Method 1

Each of the plurality of pixels includes a photodiode (PD), and the PD converts an incident light into an electric signal

Methodology Applied
Scientific EffectPhotoelectric effect: Photoelectric Effect

Data Source

PatentUS10559613B2Semiconductor device and method for fabricating the same
Publication Date: 2020.02.11 SAMSUNG ELECTRONICS CO LTD
  • US10559613B2 patent drawing
  • US10559613B2 patent drawing
  • US10559613B2 patent drawing

AI summary

A semiconductor device and a method for fabricating the same are provided. The semiconductor device includes a substrate, first and second recesses spaced apart from each other in a first direction within the substrate, a first gate electrode filling the first recess and protruding above the substrate, a second gate electrode filling the second recess and protruding above the substrate, a first source/drain formed between the first and second recesses, a second source/drain formed in an opposite direction to the first source/drain with respect to the first recess, and a third source/drain formed in an opposite direction to the first source/drain with respect to the second recess and electrically connected to the second source/drain.