Redistribution Substrate With Recessed Insulating Layer

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Solution Overview

Problem

Current semiconductor packages face challenges in achieving high-speed signal transmission, reduced size, and efficient wiring redistribution, which are essential for meeting the increasing demands of electronic devices with advanced functionalities.

Innovation Solution

The semiconductor package design incorporates a redistribution substrate with a lower protective layer, conductive patterns, insulating layers, and a semiconductor chip, featuring a unique structure with inclined surfaces and recesses that facilitate efficient electrical connections and packaging, allowing for compact and high-performance integration.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If conventional flat insulating layers are used, then manufacturing is simple, but signal transmission speed and wiring redistribution efficiency are insufficient

Engineering Contradiction:
Improvesignal transmission speedVSAvoidinsulating layer structure complexity
Core Design Contradiction:
SpeedVSDevice complexity

Solution Approach 1:

The insulating layer is designed with a curved upper surface that includes inclined surfaces and recesses instead of a flat surface. This curvature enables signal transmission paths to follow the inclined surfaces, reducing signal transmission distance and improving speed, while the recesses allow for efficient wiring redistribution without requiring additional manufacturing steps.

Inventive Principle:
Principle #14Spheroidality (Curvature)

2Area of stationary object

If larger package size is used, then wiring redistribution is easier, but package size reduction is required for smaller electronic components

Engineering Contradiction:
Improvepackage sizeVSAvoidwiring redistribution ease
Core Design Contradiction:
Area of stationary objectVSEase of manufacture

Solution Approach 1:

The insulating layer incorporates recesses that create vertical dimensionality in the wiring structure. This allows wiring to be redistributed efficiently by utilizing both horizontal and vertical spaces, enabling compact package size while maintaining ease of wiring redistribution through the multi-level structure.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Productivity

If complex insulating layer structures with inclined surfaces are used, then signal transmission and wiring redistribution improve, but manufacturing precision requirements increase

Engineering Contradiction:
Improvemanufacturing efficiencyVSAvoidinsulating layer formation precision
Core Design Contradiction:
ProductivityVSManufacturing precision

Solution Approach 1:

The insulating layer is formed with pre-designed inclined surfaces and recesses in a single manufacturing step, rather than requiring subsequent complex patterning and etching steps. This preliminary formation of the three-dimensional structure simplifies the overall manufacturing process and reduces the cumulative precision requirements across multiple steps.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS11444014B2Semiconductor packages including an insulating layer including a recessed surface and methods of manufacturing the same
Publication Date: 2022.09.13 SAMSUNG ELECTRONICS CO LTD
  • US11444014B2 patent drawing
  • US11444014B2 patent drawing
  • US11444014B2 patent drawing

AI summary

There are provided semiconductor packages including a redistribution substrate and a semiconductor chip mounted on the redistribution substrate. The redistribution substrate may include a lower protective layer, a first conductive pattern disposed on the lower protective layer, a first insulating layer surrounding the first conductive pattern and disposed on the lower protective layer, and a second insulating layer disposed on the first insulating layer. The first insulating layer may include a first upper surface that includes a first flat portion extending parallel to an upper surface of the lower protective layer, and a first recess facing the lower protective layer and in contact with the first conductive pattern. The first recess may be directly connected to the first conductive pattern.