Recessed Interposer Laser Module for Low-Inductance LiDAR Pulses
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Solution Overview
Problem
Existing LIDAR systems face challenges in generating precise, high-intensity current pulses with short rise and fall times due to parasitic inductances in the switching loop, which affect the duration and control of laser diode pulses, especially when driving multiple diodes in an array configuration.
Innovation Solution
An electronic module comprising a die with integrated LASER diodes, an interposer with an edge recess to house the die, and a driver module with GaN transistors, where electrical connections are made without wire bonding to minimize parasitic inductances, allowing for direct emission and reduced mechanical stress, and a protective shield for unobstructed beam propagation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If wire bonding is used to connect the die to the driver module, then electrical connections are established, but parasitic inductances increase which degrades pulse rise and fall times
Solution Approach 1:
The patent removes the wire bonding interconnection layer between the die and driver module, directly connecting the die pads to the driver module terminals. This extraction of the problematic wire bonding element eliminates the associated parasitic inductance while maintaining electrical connectivity through direct metallurgical or mechanical contact.
Solution Approach 2:
The patent employs an asymmetric connection architecture where the die is directly mounted on the driver module substrate with optimized trace routing, creating an asymmetric signal path that minimizes loop area and inductance. The connection structure is deliberately designed to be asymmetric in favor of reducing parasitic effects rather than using symmetric wire bonding from both sides.
2Use of energy by moving object
If the switching loop length is increased to accommodate larger capacitors, then energy storage capacity increases, but parasitic inductances increase which limits di/dt
Solution Approach 1:
The patent transitions from planar capacitor placement that increases loop area to a three-dimensional configuration where the capacitor is positioned vertically or in close proximity to the switching elements. This dimensional change reduces the current loop area while maintaining adequate energy storage capacity, thereby minimizing parasitic inductance and enabling faster di/dt.
3Reliability
If additional switches are added in parallel with LASER diodes to prevent spurious activation, then reliability improves, but device complexity increases
Solution Approach 1:
The patent converts the potentially harmful effect of parasitic inductance and resonance into a beneficial control mechanism by using the inherent electrical characteristics of the minimized-loop architecture. The reduced parasitic inductance naturally suppresses spurious oscillations and resonance effects, eliminating the need for additional protective switches while maintaining reliability.
4Ease of manufacture
If mechanical stress is applied to connect the die to the substrate, then electrical connections are established, but the LASER diode may be damaged
Solution Approach 1:
The patent changes the attachment parameters by using low-stress bonding techniques such as eutectic bonding, soldering with controlled reflow profiles, or anisotropic conductive adhesives. These methods reduce the mechanical stress and thermal shock applied to the die during attachment, preventing damage to the LASER diode while ensuring reliable electrical and mechanical connections.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration enables fast switching with rise and fall times in the range of 100 ps, facilitating controlled pulses with high current amplitudes, reducing parasitic inductances, and maintaining energy emission within safety limits while preventing mechanical and thermal stress.
Implementation Method 1
a driver module (6), arranged on the card (2), with GaN transistors
Implementation Method 2
a lighting module (4), comprising a die (4a, 4b), with integrated LASER diodes (5)
Data Source
Figure 1A~1B
Figure 2~4
Figure 3A
AI summary
An electronic module (10) for generating light pulses, comprising: an electronic card or interposer (2); a LASER-diode (5) lighting module (4); and a LASER-diode driver module (6). The interposer has an edge recess in which the lighting module is completely inserted. The driver module is arranged on top of the interposer and the lighting module. The electrical connections for driving the LASER diodes are obtained without resorting to wire bonding in order to reduce the parasitic inductances.