Recessed LOCOS Structure for Planar High-Voltage Semiconductor Dies
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Solution Overview
Problem
The integration of high-voltage processing with BCD process technology is challenging due to conflicting thermal budget and planarity requirements, making it difficult to combine advanced BCD processing with high-voltage semiconductor devices.
Innovation Solution
A semiconductor die with a lateral semiconductor device featuring a recessed LOCOS silicon oxide layer, where the LOCOS layer's surface is coplanar with the silicon layer, allowing for accurate thickness control and reduced surface topography, enabling higher voltage operation and compatibility with deep sub-micron processing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If LOCOS layers are used to increase breakdown voltage, then high voltage capability is improved, but surface planarity deteriorates requiring CMP processing
Solution Approach 1:
The patent transitions from two-dimensional planar LOCOS structures to three-dimensional recessed LOCOS structures. By etching recesses into the semiconductor substrate and filling them with LOCOS oxide, the structure gains vertical dimensionality. This allows the LOCOS surface to be coplanar with the surrounding substrate without requiring CMP, as the recess depth compensates for the oxide thickness, maintaining surface planarity while providing the high voltage breakdown capability.
Solution Approach 2:
The patent changes the physical parameters of the LOCOS structure by creating recesses with specific depths and dimensions. The recess depth is controlled to match the LOCOS oxide thickness, ensuring that the top surface of the LOCOS layer is coplanar with the substrate surface. This parameter control eliminates the need for CMP while maintaining both high voltage performance and surface planarity.
2Productivity
If advanced BCD processing is used to reduce feature size, then device density is improved, but thermal budget constraints worsen
Solution Approach 1:
The patent performs the LOCOS oxide growth in advance, before subsequent high-temperature BCD processing steps. By completing the high-temperature oxidation early in the process sequence, the thermal budget requirements for LOCOS formation do not conflict with later BCD processing steps. This preliminary action allows advanced BCD processing to proceed with its tight thermal budget constraints while still achieving high voltage breakdown capability.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach simplifies device fabrication, enhances planarity, and supports higher voltage differences, reducing the risk of electrical breakdown while maintaining compatibility with both BCD and high-voltage processing requirements.
Implementation Method 1
a layer of LOCOS silicon oxide within the recess... it is known that LOCOS silicon oxide is high-quality oxide in the sense that: the stoichiometry of the material is uniform
Data Source
AI summary
A semiconductor die is disclosed comprising a lateral semiconductor device on an upper major surface of a substrate, the integrated circuit comprising a silicon layer over the substrate, a recess in the silicon layer, a layer of LOCOS silicon oxide within the recess and having a grown upper surface which is coplanar with the surface of an un-recessed portion of the silicon layer, wherein the silicon layer beneath the recess has a non-uniform lateral doping profile, and is comprised in a drift region of the lateral semiconductor device. A method of making such a die is also disclosed, as is an integrated circuit and a driver circuit.