Recessed MOSFET Gate Dielectric With Thicker Corners for Vt Stability
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Solution Overview
Problem
Recessed MOSFETs face reliability issues due to inconsistencies in current vs. voltage behavior caused by thinner gate dielectric layers near the corners of the gate electrode, leading to varying threshold voltages across different areas.
Innovation Solution
A gate dielectric structure with thicker corner portions is formed by adding multiple dielectric layers, where the corner portions have a combined thickness greater than the central portions, ensuring consistent current flow and improved reliability by preventing undesired current leakage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a uniform gate dielectric structure is used in recessed MOSFETs, then the manufacturing process is simple, but the threshold voltage varies across different areas due to thinner dielectric at corners
Solution Approach 1:
The gate dielectric structure is designed with non-uniform thickness where corner portions have greater thickness than central portions. This local variation in dielectric thickness compensates for the corner effect, ensuring consistent threshold voltage across different areas of the MOSFET while maintaining manufacturing feasibility through selective deposition processes
2Reliability
If multiple dielectric layers are added to create thicker corner portions, then current leakage is prevented and reliability improves, but the device structure becomes more complex
Solution Approach 1:
The gate dielectric is segmented into multiple distinct layers (first gate dielectric layer, second gate dielectric layer, and third gate dielectric layer) with different thicknesses and positions. The first and second layers are concentrated at corner portions while the third layer covers the central portion, creating a multi-layered structure that prevents current leakage and ensures consistent electrical performance
Solution Approach 2:
The gate dielectric structure employs a composite arrangement of multiple dielectric layers with different thicknesses and material compositions. This composite structure combines the advantages of varying dielectric constants and thicknesses to optimize electrical performance, prevent corner effect-related leakage, and maintain manufacturing compatibility
Data Source
AI summary
In some embodiments, the present disclosure relates to a semiconductor device that includes a well region with a substrate. A source region and a drain region are arranged within the substrate on opposite sides of the well region. A gate electrode is arranged over the well region, has a bottom surface arranged below a topmost surface of the substrate, and extends between the source and drain regions. A trench isolation structure surrounds the source region, the drain region, and the gate electrode. A gate dielectric structure separates the gate electrode from the well region, the source, region, the drain region, and the trench isolation structure. The gate electrode structure has a central portion and a corner portion. The central portion has a first thickness, and the corner portion has a second thickness that is greater than the first thickness.