Recessed Electronic Package Layout for PCB Space Saving

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Solution Overview

Problem

The challenge in electronic component packaging is to efficiently utilize the space on printed circuit boards (PCBs) as electronic devices become smaller and more compact, while accommodating additional discrete components.

Innovation Solution

The design incorporates a recess on the bottom side of the electronic component package, which creates space between the component and the PCB, allowing for the integration of discrete components within this recessed area.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Area of stationary object

If the electronic component package is made compact to save PCB space, then the area occupied on the PCB is reduced, but there is insufficient space for additional discrete components

Engineering Contradiction:
ImprovePCB areaVSAvoiddiscrete component integration
Core Design Contradiction:
Area of stationary objectVSAdaptability or versatility

Solution Approach 1:

The patent utilizes the vertical dimension by creating a recess in the bottom surface of the package that extends downward toward the PCB. This allows discrete components to be positioned in the third dimension (depth) rather than requiring additional horizontal PCB area, effectively transforming a 2D space constraint into a 3D solution.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The recess structure creates a nested configuration where discrete components are positioned within the recessed area formed by the package structure itself. The package case contains the electronic chip, and the recess within the case contains discrete components, creating a hierarchical nested arrangement that maximizes space utilization.

Inventive Principle:
Principle #7Nested doll (Nesting)

2Adaptability or versatility

If discrete components are added to enhance functionality, then the adaptability and functionality of the electronic device are improved, but the PCB area requirement increases

Engineering Contradiction:
Improvedevice functionalityVSAvoidPCB area
Core Design Contradiction:
Adaptability or versatilityVSArea of stationary object

Solution Approach 1:

The patent merges the package structure with the discrete component mounting structure by integrating the recess directly into the package case. This combination allows the package to serve dual functions: protecting the electronic chip and providing a mounting location for discrete components, thereby reducing the need for separate PCB areas.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

By utilizing the vertical depth dimension through the recess structure, the patent enables discrete components to be positioned below the main package body, effectively adding functional capacity without increasing the PCB footprint in the horizontal plane.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Data Source

PatentEP4513548A1Electronic component and arrangement
Publication Date: 2025.02.26 MURATA MFG CO LTD
  • EP4513548A1 patent drawingFigure 1~2
  • EP4513548A1 patent drawingFigure 3~4
  • EP4513548A1 patent drawingFigure 5~6

AI summary

An electronic component (1) comprises a package (2) with a top side (3) and a bottom side (4), at least one electronic chip (5) housed within an enclosure (6) inside the package (2), and a plurality of electronic leads (7) protruding from the package (2) and configured to extend from at least two sides (9, 11) of the package at least in a first direction (12) extending from the top side (3) of the package towards the bottom side (4) of the package. The package (2) comprises on the bottom side (4) of the package (2) at least one recess (13). The recess (13) is provided within an area (14) defined by outer edges (15, 16) of the package (2) and the electronic leads (7) and extends at least from the bottom side (4) towards the top side (3) of the package. The recess (13) is configured to define within said area (14) a space (20) between the package and a plane defined by bottom surfaces (23) of the electronic leads (7). The space (20) is designed to receive at least one discrete component (41).