Recessed Electronic Package Layout for Thermal Stress Relief
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Solution Overview
Problem
Conventional semiconductor packages face issues such as thermal stress-induced warpage, cracking, and reliability due to mismatched thermal expansion coefficients, as well as thermal damage and high manufacturing costs due to complex processes.
Innovation Solution
An electronic package design featuring an encapsulating structure with recesses and vias, where the electronic component is placed in a recess, and conductive pillars are formed via laser, with a routing structure connected to the conductive pillars, allowing for thermal stress dissipation and simplified manufacturing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the semiconductor chip is disposed in the earlier processes, then the package can be assembled, but the semiconductor chip experiences high temperature processes causing thermal damage and reliability issues
Solution Approach 1:
The encapsulating structure is prepared in advance with pre-formed recesses and vias before the semiconductor chip is disposed. This preliminary preparation allows the chip to be placed in a later stage, avoiding exposure to high-temperature processes during encapsulant formation and routing structure creation, thereby preventing thermal damage while maintaining assembly productivity
Solution Approach 2:
The manufacturing process is segmented into distinct stages: first preparing the encapsulating structure with recesses and vias, then disposing the semiconductor chip, and finally forming the routing structure. This segmentation allows the chip to be disposed after the high-temperature encapsulant formation but before the routing structure is created, reducing cumulative thermal exposure while maintaining process efficiency
2Productivity
If conventional manufacturing processes are used, then the package can be produced, but the mismatch between CTE of package encapsulant and semiconductor chip causes warpage, cracking, and void formation
Solution Approach 1:
The encapsulating structure incorporates recesses at specific locations where the semiconductor chip is disposed. These recesses create localized stress-relief zones that accommodate differential thermal expansion between the package encapsulant and semiconductor chip, preventing warpage and cracking while maintaining overall package structural integrity during production
Solution Approach 2:
The vias and recesses are pre-formed in the encapsulating structure before the semiconductor chip is disposed and before thermal cycling occurs. These pre-formed features act as stress buffers that cushion against thermal expansion mismatches during subsequent heating processes, preventing void formation and structural failure while enabling continuous production
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The design prevents warpage and cracking, enhances reliability by avoiding thermal damage, and reduces manufacturing costs through simplified processes.
Implementation Method 1
the mismatch between the coefficients of thermal expansion (CTE) of the package encapsulant 15 and the semiconductor chip 11 may easily cause the uneven thermal stress, easily cause the warpage of the package encapsulant 15
Implementation Method 2
forming a plurality of conductive pillars in the plurality of vias
Data Source
AI summary
An electronic package and the manufacturing method thereof are provided. The method includes forming a circuit structure on an encapsulating structure with a recess and a plurality of vias, disposing a plurality of conductive pillars in the plurality of vias to be electrically connected to the circuit structure, and disposing an electronic component in the recess to be electrically connected to the circuit structure. Afterwards, a routing structure is disposed on the encapsulating structure to be electrically connected to the plurality of conductive pillars and the electronic component. Therefore, by disposing the electronic component in the recess, the encapsulating structure covers the electronic component to facilitate dissipation of thermal stress.