Recessed Pixel Contact Structure for Low-Capacitance Displays
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Solution Overview
Problem
In display devices, the formation of parasitic capacitance due to contact holes connecting the connecting electrode and the pixel electrode leads to increased power consumption and crosstalk, degrading display quality, especially when trying to achieve high-definition displays with a large number of pixels.
Innovation Solution
The display device incorporates a recess portion in the insulating layer with a contact hole at its bottom, allowing for a reduced hole diameter and increased sidewall angle of the contact hole without unnecessarily reducing the insulating layer thickness, which minimizes parasitic capacitance and power consumption while maintaining high-speed pixel driving.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If the insulating layer thickness is reduced to minimize parasitic capacitance, then power consumption decreases, but the insulating layer may become too thin to provide adequate electrical isolation
Solution Approach 1:
The patent introduces a recess portion that extends in the depth dimension (third direction) of the insulating layer, creating a stepped structure. This allows the contact hole to pass through a shorter effective insulating thickness while the overall insulating layer maintains its original thickness for adequate electrical isolation. The recess portion depth is controlled to be less than the full insulating layer thickness, achieving both goals simultaneously.
2Loss of energy
If the contact hole diameter is reduced to minimize parasitic capacitance, then power consumption decreases, but manufacturing precision becomes more difficult to achieve
Solution Approach 1:
The patent creates a localized recess portion only in the region where the contact hole needs to pass through, while the rest of the insulating layer maintains its original thickness. This local modification allows the contact hole to have a smaller effective diameter for reduced parasitic capacitance, while the manufacturing process remains manageable because the recess is formed in a controlled manner using standard photolithography and etching techniques.
3Loss of energy
If the sidewall angle of the contact hole is increased to reduce parasitic capacitance, then power consumption decreases, but the manufacturing process becomes more complex
Solution Approach 1:
The patent segments the insulating layer into two distinct regions: a recess portion with a larger sidewall angle (first angle) and a non-recess portion with a smaller sidewall angle (second angle). This segmentation allows each region to be optimized independently - the recess portion has steeper walls to reduce capacitance, while the non-recess portion maintains gentler walls for easier manufacturing. The segmented structure is achieved through controlled etching processes that create the stepped profile.
Data Source
AI summary
A display device includes a plurality of pixels arranged in a matrix on a substrate along a first direction and a second direction intersecting the first direction, each of the plurality of pixels including a transistor, a first wiring arranged over the transistor and electrically connected to the transistor, a first transparent conductive layer arranged over the first wiring and electrically connected to the transistor, a first insulating layer arranged on the first transparent conductive layer, and having a contact hole, and a second transparent conductive layer arranged on the first insulating layer and electrically connected to the first transparent conductive layer via the contact hole.