Recessed Substrate Interconnects for Reduced Package Height

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Solution Overview

Problem

Microelectronic devices face challenges in reducing their form factor due to the horizontal and vertical dimensions contributed by substrates and IC dies, limiting the potential for further miniaturization in mobile and tablet technologies.

Innovation Solution

The implementation of a recess structure within the substrate that extends through some metallization layers, allowing for a lower z-height profile by enabling circuit components to be positioned below the substrate's surface, thereby reducing the overall package height and improving space efficiency.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Length of stationary object

If traditional substrate packaging is used, then circuit components can be mounted on the substrate surface, but the package height (z-dimension) increases

Engineering Contradiction:
Improvepackage heightVSAvoidsubstrate structure complexity
Core Design Contradiction:
Length of stationary objectVSDevice complexity

Solution Approach 1:

The patent transitions from traditional surface-mounted component arrangement to a recessed configuration where components are positioned below the substrate surface plane. This dimensional change allows components to be embedded in recesses formed in the substrate, thereby reducing the overall package height while maintaining electrical connectivity through vias and conductive structures.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The substrate structure incorporates recesses that nest circuit components within the substrate body rather than placing them on the external surface. This nesting approach allows components to be housed inside the substrate volume, effectively reducing the z-dimension height requirement while maintaining all necessary functional connections.

Inventive Principle:
Principle #7Nested doll (Nesting)

2Length of stationary object

If recess structures are formed in the substrate, then z-height is reduced, but manufacturing complexity increases

Engineering Contradiction:
Improvez-height profileVSAvoidsubstrate fabrication difficulty
Core Design Contradiction:
Length of stationary objectVSEase of manufacture

Solution Approach 1:

The substrate fabrication process is divided into distinct stages: forming recesses in the substrate, depositing metallization layers, creating vias, and mounting components. This segmentation of the manufacturing process allows each step to be optimized independently, making the overall complex task of creating recessed structures more manageable and manufacturable.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The recesses are formed in the substrate before component mounting and before final metallization completion. This preliminary action allows subsequent processing steps to build upon the pre-formed recess structures, simplifying the overall manufacturing sequence by establishing the geometric framework early in the fabrication process.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS11355427B2Device, method and system for providing recessed interconnect structures of a substrate
Publication Date: 2022.06.07 INTEL CORP
  • US11355427B2 patent drawing
  • US11355427B2 patent drawing
  • US11355427B2 patent drawing

AI summary

Techniques and mechanisms to facilitate connectivity between circuit components via a substrate. In an embodiment, a microelectronic device includes a substrate, wherein a recess region extends from the first side of the substrate and only partially toward a second side of the substrate. First input/output (IO) contacts of a first hardware interface are disposed in the recess region. The first IO contacts are variously coupled to each to a respective metallization layer of the substrate, wherein the recess region extends though one or more other metallization layers of the substrate. In another embodiment, the microelectronic device further comprises second IO contacts of a second hardware interface, the second IO contacts to couple the microelectronic device to a printed circuit board.