Recessed Substrate Layout for Via-Free High-Speed Signal Routing

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Solution Overview

Problem

Electronic devices with high-speed interfaces face electromagnetic interference (EMI) issues due to reflections from via holes and reference ground asymmetry, which affect signal integrity and performance.

Innovation Solution

The electronic device system features a substrate with recess areas for the main processor chip and external device connecting portions, where signals are wired as an inner layer without via holes, ensuring direct contact and improved EMI characteristics.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If via holes are used to wire signals between layers, then electrical connection between layers is achieved, but electromagnetic interference and signal reflections occur degrading signal integrity

Engineering Contradiction:
Improvesignal integrityVSAvoidelectromagnetic interference
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The patent extracts and eliminates via holes from the signal path by implementing a substrate with recess areas that allow direct planar wiring. The connector and processor are positioned in recessed areas, enabling signal transmission through the substrate plane without penetrating via holes, thus removing the source of EMI and reflections.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent transitions from vertical signal routing through via holes to horizontal planar routing within the substrate plane. By creating recess areas and positioning components on the substrate surface, signals travel through the substrate thickness direction rather than requiring through-hole connections, changing the dimensional path of signal transmission.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Reliability

If back-drilling is performed to remove via hole stubs, then signal reflections are reduced, but manufacturing complexity and cost increase

Engineering Contradiction:
Improvesignal integrityVSAvoidmanufacturing process
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent extracts the problematic via hole stubs from the design by eliminating via holes entirely from the signal path. Instead of manufacturing via holes and then performing back-drilling to remove stubs, the design directly avoids via hole creation in the signal transmission path, simplifying the manufacturing process.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The substrate structure is designed in advance with recess areas and planar wiring paths that prevent via hole stub formation from the beginning. This preliminary design approach eliminates the need for subsequent back-drilling operations, as the structure is configured to avoid the problem rather than correct it later.

Inventive Principle:
Principle #10Preliminary action

3Reliability

If EMI shielding materials are added to reduce electromagnetic interference, then signal integrity improves, but device complexity and cost increase

Engineering Contradiction:
Improvesignal integrityVSAvoidsubstrate structure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent converts the substrate structure itself into the EMI solution by using the recess areas and planar wiring configuration to inherently reduce electromagnetic interference. Instead of adding separate shielding materials, the design uses the structural arrangement to minimize EMI generation and propagation, making the substrate structure beneficial for EMI reduction.

Inventive Principle:
Principle #22Blessing in disguise (Convert harm into benefit)

4Ease of manufacture

If reference ground asymmetry is present in via hole structures, then manufacturing is simplified, but signal integrity deteriorates due to EMI

Engineering Contradiction:
Improvesubstrate fabricationVSAvoidsignal integrity
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The patent removes via holes from the signal path, eliminating the reference ground asymmetry problem associated with via hole structures. The planar wiring approach in recess areas provides symmetric reference grounds without the geometric asymmetries inherent in via hole configurations.

Inventive Principle:
Principle #2Taking out (Extraction)

Data Source

PatentUS20240260205A1Electronic devices and electronic device systems
Publication Date: 2024.08.01 SAMSUNG ELECTRONICS CO LTD
  • US20240260205A1 patent drawing
  • US20240260205A1 patent drawing
  • US20240260205A1 patent drawing

AI summary

Provided is an electronic device system including a first electronic device including a first substrate, a second electronic device including a second substrate, and a data transferer including a first connector and a second connector, the data transferer configured to connect the first electronic device and the second electronic device, the first substrate including the first recess area and the second recess area spaced apart from the first recess area, and the first recess area and the second recess area are at a same depth.