Recessed THV and Stepped RDL for Semiconductor Die Reliability

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Solution Overview

Problem

The existing semiconductor manufacturing processes face challenges with die chipping and misalignment during the formation of through-hole vias (THVs) and redistribution layers (RDLs) in the peripheral regions of semiconductor devices, leading to irregular cutting and increased complexity in interconnect routing.

Innovation Solution

The formation of a recessed conductive THV and stepped RDLs in the peripheral region around the semiconductor die, where an insulating layer is removed to create a recess, and a conductive layer is formed to connect with contact pads, with an insulating material deposited to house the THV, which is recessed with respect to the die surface, addressing misalignment and chipping issues.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If THVs are formed in the saw streets, then electrical interconnection between stacked die is achieved, but the wafer must be expanded which causes die misalignment and makes RDL patterning more difficult

Engineering Contradiction:
Improveelectrical interconnectionVSAvoiddie alignment
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The recess is formed in the peripheral region before wafer expansion, and the stepped-down RDL is patterned to conform to this recess. This preliminary structuring allows the RDL to accommodate post-expansion misalignment by following the contour of the recess, thereby maintaining electrical connection reliability despite die position shifts.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The peripheral region is given a different structure (recess with stepped-down RDL) compared to the central die area. This local structural modification allows the RDL to conform to the recess profile, providing tolerance for misalignment specifically at the interconnect region without affecting the die active area.

Inventive Principle:
Principle #3Local quality

2Productivity

If sawing is performed prior to wafer expansion, then die separation is achieved, but irregular cutting and die chipping occur

Engineering Contradiction:
Improvedie separationVSAvoiddie integrity
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The recess is formed in the peripheral region before the sawing process. This pre-formed recess provides a structural guide that helps the saw blade follow a more consistent path, reducing irregular cutting and die chipping while still achieving effective die separation.

Inventive Principle:
Principle #10Preliminary action

3Ease of operation

If test contact pads are located in saw streets, then die testing is enabled, but sawing through these pads causes die chipping due to their brittle nature

Engineering Contradiction:
Improvedie testingVSAvoiddie integrity
Core Design Contradiction:
Ease of operationVSReliability

Solution Approach 1:

The test contact pads are extracted from the saw street location and relocated to the peripheral region where the recess is formed. This separation removes the brittle pads from the high-stress sawing zone, eliminating the chipping problem while preserving testing capability through the peripheral access.

Inventive Principle:
Principle #2Taking out (Extraction)

Data Source

PatentUS8080882B2Semiconductor device and method of forming stepped-down RDL and recessed THV in peripheral region of the device
Publication Date: 2011.12.20 JCET SEMICON (SHAOXING) CO LTD
  • US8080882B2 patent drawing
  • US8080882B2 patent drawing
  • US8080882B2 patent drawing

AI summary

A semiconductor die has a peripheral region around the die. An insulating layer is formed over the semiconductor die. A portion of the insulating layer and peripheral is removed to form a recess around the semiconductor die. A conductive layer is deposited over the insulating layer and recess. The conductive layer is electrically connected to contact pads on the semiconductor die and conforms to a step into the recess. A gap is created through the conductive layer and peripheral region around the semiconductor die. An insulating material is deposited in the gap. A portion of the insulating material is removed to form a through hole via (THV). A conductive material is deposited in the THV to form a conductive THV. The conductive THV is recessed with respect to a surface of the semiconductor die. The conductive THV is electrically connected to the conductive layer.