Recessed Through Silicon Via Pads for High Density IC Packaging

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Current technologies face challenges in manufacturing high-speed computer devices exceeding one TeraHertz, with limitations in assembly, cooling, reliability, and cost-effectiveness, particularly in achieving smaller package footprints and robust computer chips for next-generation portable electronics.

Innovation Solution

The method involves creating an integrated circuit system with a substrate having a via and a trench, filled with a conductive pillar, a recessed contact pad partially filled with solder, and an under-bump metal extending beyond the substrate's face surface, enhancing electrical connections and assembly precision.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Area of moving object

If conventional through-silicon via structures are used, then manufacturing is simpler, but package footprint is larger and I/O density is lower

Engineering Contradiction:
Improvepackage footprintVSAvoidstructure complexity
Core Design Contradiction:
Area of moving objectVSDevice complexity

Solution Approach 1:

The patent transitions from conventional planar contact pads to three-dimensional recessed contact pads formed within trenches etched into the substrate back surface. This vertical dimensionality change allows contact pads to be embedded within the substrate volume rather than occupying only the surface area, thereby reducing package footprint while maintaining electrical connection functionality

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The contact pads are nested within trenches etched into the substrate, creating a hierarchical structure where the conductive material is contained within the substrate volume. This nesting approach allows multiple I/O connections to be packed more densely within the same package footprint area

Inventive Principle:
Principle #7Nested doll (Nesting)

2Productivity

If recessed contact pads in trenches are implemented, then I/O density increases and package footprint decreases, but manufacturing complexity and production cost increase

Engineering Contradiction:
ImproveI/O densityVSAvoidmanufacturing complexity
Core Design Contradiction:
ProductivityVSEase of manufacture

Solution Approach 1:

The manufacturing process is segmented into distinct sequential steps: trench etching, conductive material deposition, and solder bump formation. This segmentation allows each complex step to be optimized independently and enables the use of standard semiconductor manufacturing equipment and processes for each individual step

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The trenches are etched and conductive materials are deposited into the trenches before the final solder bump formation step. This preliminary preparation of the recessed contact pad structures enables subsequent automated soldering processes to proceed efficiently with standard equipment, reducing overall manufacturing complexity

Inventive Principle:
Principle #10Preliminary action

3Reliability

If larger contact pads are used, then assembly is more robust, but package footprint increases

Engineering Contradiction:
Improveassembly robustnessVSAvoidpackage footprint
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The contact pads are extended into the vertical dimension by forming them within trenches that penetrate into the substrate back surface. This allows the contact pad area to be increased for better mechanical robustness and solder joint strength without proportionally increasing the horizontal package footprint, as the additional contact pad area is achieved through vertical embedding rather than lateral expansion

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Data Source

PatentUS8202797B2Integrated circuit system with recessed through silicon via pads and method of manufacture thereof
Publication Date: 2012.06.19 JCET SEMICON (SHAOXING) CO LTD
  • US8202797B2 patent drawing
  • US8202797B2 patent drawing
  • US8202797B2 patent drawing

AI summary

A method of manufacture of an integrated circuit system includes: providing a substrate with a face surface having a via therein and a back surface having a trench therein; filling the via with a conductive pillar; forming a recessed contact pad in the trench; filling the recessed contact pad partially with solder; and forming an under-bump metal having a base surface in electrical contact with the conductive pillar, and having sides that extend away from the face surface of the substrate and further extend beyond the base surface.