Recessed Electronic Unit Layout for Ordered Fluid Transfer Bonding
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Solution Overview
Problem
The fluid transfer process for electronic units often results in disordered placement, leading to increased difficulty in forming wires and abnormal electrical connections, which affects the yield of electronic devices.
Innovation Solution
The electronic device design includes a substrate with recesses that accommodate electronic units, where the size of the recess and unit, along with the number of signal connecting points, are optimized to ensure proper alignment and bonding, reducing the likelihood of abnormal electrical connections by maintaining a specific size relationship and pattern design.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If fluid transfer process is used to transfer electronic units to target substrate, then mass production is achieved, but electronic units are disposed in disordered arrangement
Solution Approach 1:
The patent applies preliminary action by pre-forming recesses in the target substrate before transferring electronic units. These recesses are designed with specific sizes and positions that guide the electronic units to settle in predetermined locations during the fluid transfer process, thereby achieving ordered arrangement without compromising mass production capability
Solution Approach 2:
The patent introduces recesses as an intermediary structure between the electronic units and the target substrate. These recesses act as positioning features that mediate the transfer process, ensuring that electronic units are placed in correct positions while maintaining the efficiency of fluid transfer method
2Ease of manufacture
If electronic units are disposed in disordered arrangement, then fluid transfer process is simple, but difficulty of subsequent wire forming process increases
Solution Approach 1:
The patent applies preliminary action by pre-forming recesses in the target substrate before transferring electronic units. These recesses are designed with specific sizes and positions that guide the electronic units to settle in predetermined locations during the fluid transfer process, thereby achieving ordered arrangement without compromising mass production capability
Solution Approach 2:
The patent introduces recesses as an intermediary structure between the electronic units and the target substrate. These recesses act as positioning features that mediate the transfer process, ensuring that electronic units are placed in correct positions while maintaining the efficiency of fluid transfer method
3Productivity
If electronic units are disposed in disordered arrangement, then fluid transfer process is used, but abnormal electrical connections occur affecting yield
Solution Approach 1:
The patent applies preliminary action by pre-forming recesses in the target substrate before transferring electronic units. These recesses are designed with specific sizes and positions that guide the electronic units to settle in predetermined locations during the fluid transfer process, thereby achieving ordered arrangement without compromising mass production capability
Solution Approach 2:
The patent introduces recesses as an intermediary structure between the electronic units and the target substrate. These recesses act as positioning features that mediate the transfer process, ensuring that electronic units are placed in correct positions while maintaining the efficiency of fluid transfer method
Data Source
AI summary
An electronic device is provided by the present disclosure. The electronic device includes a substrate and at least one electronic unit. The substrate has at least one recess, and the at least one electronic unit is disposed in the at least one recess. The at least one electronic unit has N1 signal connecting points, wherein N1 is greater than or equal to 1. In a top view direction of the electronic device, the at least one recess has a maximum size D1, the at least one electronic unit has a maximum size C1, and the maximum size D1 and the maximum size C1 satisfies: 0<D1−C1<C1/N1.


