Reciprocal Current DAC Delay Circuit for Linear Signal Timing
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Solution Overview
Problem
Conventional methods for generating a digital signal delay are inefficient, requiring large capacitors or power-hungry reference voltage changes, and often fail to achieve a linear delay-control relationship, leading to high power consumption and dependence on process, voltage, and temperature (PVT) variations.
Innovation Solution
A circuit comprising a delay cell and a reciprocal current digital-to-analog converter (DAC) generates a delay that is linearly proportional to a control input, using a feedback circuit and bias current to regulate the charge current and operating voltage, independent of reference voltage and temperature variations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If conventional methods use multiple capacitors to achieve different delay settings, then delay control flexibility is improved, but circuit area increases significantly
Solution Approach 1:
The patent changes the controlling parameter from capacitance value to reference voltage level. By varying the reference voltage in a delay-locked loop (DLL), the delay can be adjusted continuously without requiring multiple discrete capacitors. This parameter substitution resolves the contradiction by achieving delay flexibility through voltage control rather than through multiple capacitive elements, thereby reducing circuit area while maintaining adaptability.
2Manufacturing precision
If conventional methods use fast changing reference voltage for linear delay control, then delay linearity is improved, but power consumption increases
Solution Approach 1:
The patent introduces a feedback mechanism where the delay line output is compared with the input signal, and the phase difference is used to adjust the reference voltage. This closed-loop feedback ensures linear delay control by automatically compensating for non-linearities, while avoiding the need for excessively fast voltage changes that would increase power consumption. The feedback control achieves precision without sacrificing energy efficiency.
3Ease of operation
If conventional methods use current-starved inverter-based delay elements, then delay adjustment is simplified, but achieving linear relationship between control vector and delay becomes difficult
Solution Approach 1:
The patent employs a delay-locked loop (DLL) structure that serves multiple functions: it provides both simple delay adjustment through the control voltage and ensures linear delay control through the feedback mechanism. The DLL architecture universally handles both the simplicity of adjustment and the precision of linearity, resolving the contradiction by making a single structure perform both functions simultaneously.
4Duration of action of moving object
If conventional circuits use large capacitors for delay generation, then delay range is extended, but power consumption and PVT dependence increase
Solution Approach 1:
The patent replaces the mechanical/electrical system of large capacitors with a voltage-controlled timing mechanism based on delay-locked loops. Instead of using large capacitive elements that consume power and are sensitive to PVT variations, the invention uses voltage control to adjust the delay through the DLL's phase detector and charge pump. This substitution achieves extended delay range while reducing power consumption and PVT dependence by using voltage rather than capacitance as the primary control mechanism.
Data Source
AI summary
The present document discloses a circuitry for delaying a digital input signal. In particular, the circuitry may comprise a delay cell circuit and a reciprocal current digital-to-analog converter (DAC). The delay cell circuit may be coupled to the reciprocal current DAC. More particularly, the reciprocal current DAC may be configured to output a charge current to the delay cell circuit according to a value of a control input provided to the reciprocal current DAC. The charge current output by the reciprocal current DAC may be inversely proportional to the value of the control input, wherein the delay depends on the charge current.