Recirculating Delay Loop With Phase Interpolator for Signal Alignment
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Solution Overview
Problem
Network communication signals, such as SYNC and SYSCLK, often become misaligned due to variations in PCB trace lengths and buffer usage, leading to timing errors that existing technologies have not adequately addressed.
Innovation Solution
A delay circuit is implemented with an input selector, loop delay, variable delay, and output selector to recirculate signals, allowing for programmable delay adjustments by combining fixed and variable delays to align signals accurately, using a phase interpolator for fine delay adjustments and control logic to manage recirculation and selection processes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If different PCB traces and buffers are used for signal transmission, then signal routing flexibility is improved, but timing synchronization deteriorates
Solution Approach 1:
The patent changes the time domain parameter by introducing variable delay circuits that can adjust signal timing dynamically. The delay circuit modifies the temporal characteristic of signals to compensate for path differences, allowing the system to maintain synchronization despite using different PCB traces and buffers for routing flexibility.
Solution Approach 2:
The patent implements a feedback mechanism where the actual timing of received signals is measured and used to control the delay circuit. The system monitors timing deviations and adjusts the delay parameters accordingly, creating a closed-loop control system that maintains synchronization while allowing flexible signal routing.
2Ease of manufacture
If fixed delay circuits are used for signal alignment, then manufacturing simplicity is improved, but adaptability to different timing requirements deteriorates
Solution Approach 1:
The patent segments the delay function into multiple independent delay elements that can be individually controlled. Instead of a single fixed delay circuit, the system uses multiple variable delay circuits that can be independently adjusted, allowing the manufacturer to use simple standardized components while providing flexible timing adjustment capability through digital control.
Solution Approach 2:
The patent transforms the static fixed delay circuit into a dynamic variable delay circuit. The delay parameter is made adjustable through digital control signals, allowing the system to adapt to different timing requirements dynamically. This enables the same hardware to serve multiple timing configurations without requiring manual reconfiguration or complex manufacturing.
Data Source
AI summary
A delay circuit provides a programmable delay and includes an input selector circuit to select between a loop delay output signal and an input signal. A loop delay circuit provides a loop delay to the input signal and supplies the loop delay output signal. The input signal can be recirculated through the loop delay circuit to extend the range of the delay. The input selector circuit selects the feedback signal during recirculation. A variable delay circuit provides a variable delay to the loop delay output signal after the recirculation is complete and supplies a variable delay output signal. An output selector circuit selects the output of the output selector circuit during the recirculation and selects the variable delay output signal after the recirculation is complete to thereby provide a delayed signal with the delay based on the loop delay, the number of loops of recirculation, and the variable delay.