Reconfigurable ADC Front End for Low-Power Edge Conversion
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Solution Overview
Problem
Current analog to digital converter (ADC) designs are inadequate for 'edge' devices, requiring improvements in power efficiency, speed, accuracy, autonomy, and compactness, as they often rely on external components and suffer from high computational loading and power consumption.
Innovation Solution
A dynamically reconfigurable ADC system with a reconfigurable analog front end (AFE) and sequencer that allows for multiple channel configurations, including timing, gain, and filtering settings, enabling autonomous operation and reducing reliance on external processors, and supporting various analog input types.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If current ADC designs are used in edge devices, then basic conversion function is provided, but power consumption is high and computational loading is heavy
Solution Approach 1:
The ADC system is segmented into multiple independent conversion circuits (first ADC conversion circuit, second ADC conversion circuit) that can operate autonomously. Each circuit handles specific conversion tasks without requiring centralized external processing, thereby reducing overall computational loading and power consumption while maintaining conversion functionality.
Solution Approach 2:
The ADC conversion circuits are designed to perform self-service operations including autonomous conversion, internal timing control, and independent operation. The circuits can function without continuous external processor intervention, reducing the computational burden on external devices and lowering power consumption in edge device applications.
2Adaptability or versatility
If reconfigurable ADC conversion circuits are implemented, then adaptability and autonomy are improved, but device complexity increases
Solution Approach 1:
The ADC conversion circuits are designed with multi-functionality to perform various conversion operations across different channels (first AFE channel, second AFE channel) with configurable parameters. The same hardware infrastructure supports multiple conversion modes and configurations, reducing overall device complexity while improving adaptability.
Solution Approach 2:
The ADC system implements dynamic reconfiguration capabilities where conversion circuits can be programmatically adjusted during operation. The sequencer and control logic enable real-time modification of conversion parameters, timing, and channel assignments without requiring complete system redesign, balancing flexibility with manageable complexity.
3Productivity
If multiple ADC conversion circuits operate autonomously, then conversion speed and accuracy are improved, but timing synchronization becomes more difficult
Solution Approach 1:
The system implements preliminary timing setup through a sequencer that pre-configures conversion timing for multiple ADC circuits. By establishing timing schedules and synchronization protocols in advance, the system enables fast autonomous conversion operations while maintaining precise timing coordination between multiple circuits without real-time synchronization delays.
Data Source
AI summary
One example discloses a reconfigurable analog to digital converter (ADC) device, including: an analog front end (AFE) configured to receive a set of analog input signals and generate a corresponding set of digital output signals; wherein the AFE includes a set of reconfigurable ADC conversion circuits; and a sequencer coupled to the AFE and configured to control the set of reconfigurable ADC conversion circuits with a first AFE channel configuration at a first time and a second AFE channel configuration at a second time.