Reconfigurable Array Defect Repair via Spare Unit Rerouting
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Reconfigurable processors face challenges in manufacturing yield due to defects, as existing technologies lack effective methods to repair unusable elements within these processors, particularly in coarse-grained reconfigurable arrays.
Innovation Solution
A spatially reconfigurable array architecture with spare elements and a parameter store that tags unusable elements, allowing for the reconfiguration of unit configuration files and interconnects to reroute data around defective units, using virtual addressing and configuration controllers to maintain functionality.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If manufacturing processes are used to produce reconfigurable processors, then production volume increases, but manufacturing defects occur that render parts unusable
Solution Approach 1:
The patent applies preliminary action by pre-configuring spare configurable units and establishing defect repair circuits before the processor operates. During manufacturing testing, defective units are identified and tagged, and spare units are pre-assigned to replace them. This advance preparation ensures that when defects are found, the processor can be quickly reconfigured without extensive recompilation, thus maintaining high productivity while compensating for manufacturing defects.
Solution Approach 2:
The patent utilizes parameter changes by modifying the configuration parameters of the processor through defect repair circuits. When a defect is detected, the system changes the configuration parameters to reroute data flow and reassign functional units, effectively transforming the processor's operational parameters to bypass defective elements. This allows the processor to maintain functionality despite manufacturing variations.
2Reliability
If defective elements are repaired using existing technologies, then some functionality is restored, but extensive recompilation of configuration files is required
Solution Approach 1:
The patent applies preliminary action by pre-compiling multiple configuration files corresponding to different defect scenarios before the processor operates. During manufacturing testing, when defects are identified, the system selects the pre-compiled configuration file that matches the defect pattern. This eliminates the need for extensive recompilation at runtime, as the appropriate configuration is already prepared and can be loaded immediately, thus restoring functionality with minimal time loss.
Solution Approach 2:
The patent uses copying by creating multiple copies of configuration files tailored to different defect scenarios. Instead of generating a new configuration file from scratch when a defect is found, the system copies and loads a pre-prepared configuration file that already accounts for the specific defect pattern. This copying approach significantly reduces the time required to restore functionality compared to extensive recompilation.
3Reliability
If spare elements are added to the array, then defect repair capability is improved, but device complexity increases
Solution Approach 1:
The patent applies universality by designing spare configurable units that can serve multiple functions. The spare units are not dedicated to specific replacement tasks but can be dynamically assigned to replace any defective unit in the array through reconfiguration. This multi-functional approach allows a smaller number of spare units to provide comprehensive defect repair coverage, reducing the overall increase in device complexity while maintaining high reliability.
Solution Approach 2:
The patent implements discarding and recovering by identifying defective configurable units during manufacturing testing, tagging them as unusable, and recovering their functional capacity through spare units. The defective units are effectively discarded from active service, but their computational function is recovered and transferred to spare units through reconfiguration. This approach maximizes the utilization of spare elements while minimizing the impact on device complexity.
Data Source
AI summary
A computing system includes an array of configurable units made up of sub-arrays of configurable units. Each sub-array has a first number of configurable compute units and a second number of configurable memory units with a first spatial arrangement. Each configurable unit includes a configuration data store. The system also includes a statically configurable bus system coupled to the configurable units and a tag indicating a sub-array of configurable units having a defect. A defect-aware configuration controller sends configuration data to the configuration data stores to implement a data processing operation using the array of configurable units by generating static route control signals for the statically configurable bus system, based on the tag and without support of a host processor, to send a portion of the configuration data targeted to the sub-array having the defect to a configuration data store of an alternative sub-array of configurable units in the array.