Processor for Reconfigurable Circuit Task Priority Scheduling

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Solution Overview

Problem

In reconfigurable circuits, insufficient space area leads to inefficiencies as new circuits cannot be reconfigured, causing next processing tasks to wait until space becomes available, resulting in decreased efficiency.

Innovation Solution

A processor dynamically reconfigures circuits in a reconfigurable circuit by determining assigned times and priority processing ranks for multiple tasks based on costs, such as used block areas or resource priorities, to optimize task execution and reduce standby time.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If reconfigurable circuits are used to execute multiple tasks, then task processing capability is improved, but when space area is insufficient, new circuits cannot be reconfigured causing next processing to wait, resulting in decreased efficiency

Engineering Contradiction:
Improvetask processing capabilityVSAvoidprocessing efficiency
Core Design Contradiction:
Adaptability or versatilityVSProductivity

Solution Approach 1:

The patent implements dynamic reconfiguration of circuit blocks based on real-time task priorities and resource costs. The system continuously monitors the operating state and dynamically adjusts which circuits are active, allowing high-priority tasks to preempt lower-priority ones. This dynamic approach resolves the contradiction by making the reconfigurable circuit adaptive to changing task requirements while maintaining high processing efficiency through priority-based resource allocation.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The system changes the parameter of circuit block assignment by introducing cost functions that evaluate different reconfiguration scenarios. By calculating costs based on task priorities, circuit complexities, and resource usage, the system selects optimal reconfiguration strategies. This parameter-based decision-making enables efficient space utilization while ensuring high-priority tasks receive necessary resources, thus maintaining both versatility and productivity.

Inventive Principle:
Principle #35Parameter changes

2Productivity

If high-cost circuits are prioritized for early completion, then overall system efficiency is improved, but resource allocation complexity increases

Engineering Contradiction:
Improvesystem efficiencyVSAvoidresource allocation complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent introduces cost parameters that quantify resource consumption and task priority levels. By transforming the resource allocation problem into a cost-minimization optimization problem, the system can systematically determine which circuits should complete early. The cost function incorporates multiple factors including task urgency, circuit execution time, and resource consumption, enabling efficient decision-making without excessive complexity.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The system implements self-service through automated cost calculation and priority-based scheduling. The processor automatically evaluates the operating state, calculates reconfiguration costs, and determines optimal task scheduling without external intervention. This self-managing approach handles the allocation complexity internally while presenting a simple interface for task submission, thus improving system efficiency without burdening the user with complexity.

Inventive Principle:
Principle #25Self-service

Data Source

PatentUS10162795B2Processor for changing weight of costs needed in reconfigurable circuit
Publication Date: 2018.12.25 FUJITSU LTD
  • US10162795B2 patent drawing
  • US10162795B2 patent drawing
  • US10162795B2 patent drawing

AI summary

A processor controls a reconfigurable circuit capable of dynamically reconfiguring a circuit which achieves a task of a computer, the processor executes a process having determining, when reconfiguring each of circuits which achieve a plurality of tasks in the reconfigurable circuit, assigned times of time sharing of the plurality of tasks or priority processing ranks of the plurality of tasks based on costs needed in the reconfigurable circuit for respective circuits which achieve the plurality of tasks.