Reconfigurable Computing Tiles for HPC Stream Ingestion

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Solution Overview

Problem

There is a lack of convenient approaches to integrate programmable elements like FPGAs with traditional High Performance Computing (HPC) form factors, and existing solutions struggle to efficiently ingest and transfer large data streams in HPC cluster environments, limiting their utilization for stream computing.

Innovation Solution

A reconfigurable computing appliance (RCA) is designed to package FPGAs in a standardized 19" rack form factor, providing direct I/O access and connections to RDMA-enabled HPC cluster fabrics like InfiniBand, RoCE, and Ethernet, allowing scalable and flexible integration of programmable logic elements.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If programmable logic elements (FPGAs) are packaged as add-in boards for COTS rack servers, then they can be integrated into HPC clusters, but they have limited I/O capacity and lack cluster fabric integrated capabilities

Engineering Contradiction:
Improvecluster fabric integration capabilityVSAvoidI/O capacity limitation
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The system divides the HPC cluster into modular computing nodes, each equipped with FPGA accelerators and network fabric interfaces. This segmentation allows each node to independently handle data streaming and processing tasks while maintaining full cluster fabric connectivity, overcoming the I/O limitations of add-in board configurations.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The computing nodes are designed with universal interfaces that support multiple functions: they can simultaneously serve as compute nodes, network fabric interfaces, and data streaming endpoints. This multi-functionality eliminates the need for separate specialized hardware for cluster fabric integration, directly addressing the adaptability limitation of traditional add-in boards.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Adaptability or versatility

If OpenVPX circuit card assemblies are implemented in card cage-style embedded computing environments, then they provide robust cluster fabric interfaces, but they cannot efficiently handle large numbers of externally connected I/O

Engineering Contradiction:
Improveexternally connected I/O handling capabilityVSAvoidcluster fabric interface robustness
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent merges the cluster fabric interface capabilities with the external I/O handling functions into a single integrated computing node architecture. The FPGA accelerator, network fabric interface, and external I/O controllers are combined in a unified system that can simultaneously manage both robust cluster fabric communication and large numbers of external I/O connections, resolving the contradiction between these two capabilities.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The system transitions from a two-dimensional card cage layout to a three-dimensional modular node architecture. This dimensional change allows for expanded I/O connectivity in multiple spatial directions while maintaining robust cluster fabric interfaces, enabling efficient handling of large numbers of externally connected I/O without compromising cluster fabric interface robustness.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Productivity

If traditional HPC form factors are used for programmable elements, then they maintain standard compatibility, but they lack convenient approaches for efficient data stream ingestion and processing

Engineering Contradiction:
Improvedata stream processing efficiencyVSAvoidintegration convenience
Core Design Contradiction:
ProductivityVSEase of operation

Solution Approach 1:

The computing nodes are designed with self-service capabilities where the FPGA accelerators directly interface with the network fabric and data streams without requiring complex external configuration or management systems. The nodes autonomously ingest, process, and output data streams, significantly improving processing efficiency while simplifying integration through standardized HPC form factors that maintain compatibility with existing infrastructure.

Inventive Principle:
Principle #25Self-service

Data Source

PatentEP3935512B1Reconfigurable computing appliance
Publication Date: 2025.11.19 RAYTHEON CO
  • EP3935512B1 patent drawingFigure 1
  • EP3935512B1 patent drawingFigure 2
  • EP3935512B1 patent drawingFigure 3

AI summary

A reconfigurable computing appliance includes a number of computing tiles. Each computing tile includes a reconfigurable processing element and a network fabric interface device configured to communicate over a network fabric. The reconfigurable processing element operates on data received from an I/O input interface and/or data received via the network fabric interface device.