Reconfigurable Processor Direct Storage Access Bypassing Host Memory
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Solution Overview
Problem
Traditional data processing systems with reconfigurable processors face inefficiencies in moving data between reconfigurable processors and external storage, requiring multiple operations through host memory, leading to high latency and resource utilization.
Innovation Solution
A data processing system enabling direct access to external storage by reconfigurable processors, bypassing the host processor and memory, allowing for low latency and high bandwidth data transfer.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of time
If data is moved through host memory and processor, then data can be transferred between reconfigurable processors and external storage, but latency increases and resource utilization decreases
Solution Approach 1:
The patent extracts the data transfer function from the host processor and memory subsystem, allowing reconfigurable processors to directly access external storage. This separation removes the bottleneck where data must pass through host memory, reducing latency and freeing host resources for other tasks.
Solution Approach 2:
The patent introduces a storage controller as an intermediary component that enables direct access between reconfigurable processors and external storage. This mediator manages the data transfer path independently of the host processor, facilitating efficient data movement without requiring host intervention.
2Productivity
If multiple operations are used to move data through host memory, then data can be transferred to external storage, but resource utilization decreases
Solution Approach 1:
The patent enables reconfigurable processors to perform data transfer operations independently without requiring continuous host processor involvement. The storage controller and reconfigurable processors work together to manage data movement, reducing host resource consumption and improving overall system productivity.
3Speed
If direct access path is created, then latency is reduced and bandwidth is increased, but system architecture complexity increases
Solution Approach 1:
The storage controller serves multiple functions: it manages direct data access, handles memory mapping, coordinates data transfer, and interfaces with both reconfigurable processors and external storage. This multi-functionality consolidates complexity into a single component rather than distributing it across multiple subsystems.
Data Source
AI summary
A data processing system is presented that includes multiple local buses, a host processor, a network interface controller (NIC) for connecting to external storage via a network, one or more reconfigurable processors, and a bus switch. The bus switch couples the multiple local busses, thereby operatively coupling the one or more reconfigurable processors, the host processor, and the NIC. The one or more reconfigurable processors are configured to implement a virtual function that uses a virtual address for a memory access operation. The host processor is configured to implement an application programming interface (API) that translates the virtual address into a physical address, and the NIC uses the physical address to initiate a direct data access operation at the external storage that moves data directly between the one or more reconfigurable processors and the external storage, wherein the data bypasses the host processor.