Reconfigurable Fabric Data Flow Graph Exception Handling

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Solution Overview

Problem

Current data processing systems face challenges in handling large-scale data analysis due to limitations in traditional processors and analysis techniques, leading to inefficiencies in data handling, storage, and processing, especially when dealing with big data sets that require advanced computations such as machine learning and deep learning tasks.

Innovation Solution

A reconfigurable fabric-based data flow graph computation method that adapts processing elements to implement data flow graphs, allowing for error exception handling through interrupt requests and state management, enabling efficient execution of complex computations like machine learning and deep learning operations.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If traditional processors are used for big data analysis, then data handling capacity is limited, but system complexity and processing time increase

Engineering Contradiction:
Improvedata processing throughputVSAvoidexecution time
Core Design Contradiction:
ProductivityVSLoss of time

Solution Approach 1:

The system segments the data flow graph into multiple independent nodes that can be executed in parallel across multiple processing elements. Each node represents a discrete computational task that can be independently scheduled and executed, enabling concurrent processing of different portions of the data flow graph simultaneously.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The system dynamically configures processing elements to match the computational requirements of each data flow graph node. Processing elements can be reconfigured on-the-fly to implement different computational operations, allowing the system to adapt its processing capabilities dynamically based on the specific tasks being executed.

Inventive Principle:
Principle #15Dynamics

2Productivity

If reconfigurable fabric is used to implement data flow graphs, then processing efficiency improves, but error handling complexity increases

Engineering Contradiction:
Improvecomputation execution speedVSAvoiderror management complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The system implements feedback mechanisms where processing elements monitor their own execution state and raise interrupt requests when errors are detected. The host processor receives these interrupts and provides corrective feedback, creating a closed-loop error handling system that maintains processing efficiency while managing complexity through structured feedback paths.

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The host processor acts as an intermediary between the reconfigurable fabric and the error handling logic. It receives interrupt requests from processing elements, manages the complexity of error recovery, and coordinates state management, thereby shielding the high-speed fabric from complex error management overhead.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Productivity

If parallel execution is implemented in data flow graph, then processing throughput increases, but coordination overhead and error management become more complex

Engineering Contradiction:
Improveparallel processing throughputVSAvoidsynchronization and error coordination
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

Processing elements are designed to autonomously detect errors in their own execution and generate interrupt requests without external intervention. Each processing element independently manages its own error detection and notification, reducing the coordination overhead required for parallel error management while maintaining high throughput.

Inventive Principle:
Principle #25Self-service

Data Source

PatentUS10949328B2Data flow graph computation using exceptions
Publication Date: 2021.03.16 MIPS HLDG INC
  • US10949328B2 patent drawing
  • US10949328B2 patent drawing
  • US10949328B2 patent drawing

AI summary

Techniques are disclosed for data manipulation within a reconfigurable computing environment for data flow graph computation using exceptions. Processing elements are configured within a reconfigurable fabric to implement a data flow graph. The processing elements are loaded with process agents. Valid data is executed by a first process agent on a first processing element, where the first process agent corresponds to a starting node of the data flow graph. A second processing element detects that an error exception has occurred, where a second process agent is running on the second processing element. A done signal to a third process agent is withheld by the second process agent, where the third process agent is running on a third processing element. The second process agent raises an interrupt request, where the interrupt request is based on the detecting that an error exception has occurred.