Reconfigurable Hardware Execution Using Likely Data Value Prediction

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Solution Overview

Problem

Existing processing architectures face challenges in predicting the execution order of computer instructions, particularly when branch instructions are involved, leading to pipeline flushes and reduced performance due to incorrect predictions and hardware limitations.

Innovation Solution

The proposed solution involves identifying likely data values based on program data values to generate anticipated computer instructions, allowing for execution without being limited by branch instructions, and restoring the processing circuitry to an initial state upon failed predictions to optimize pipeline usage.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If traditional branch prediction methods are used to handle control-flow instructions, then the processing unit can maintain pipeline execution, but prediction accuracy decreases leading to pipeline flushes and reduced performance

Engineering Contradiction:
Improveprocessing throughputVSAvoidprediction accuracy
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent creates a copy of the processing circuitry in a different configuration to execute alternative instruction sets. When the predicted execution path is incorrect, the system switches to the copied configuration that was prepared for the alternative path, avoiding pipeline flushes and maintaining high prediction accuracy without requiring complex prediction logic.

Inventive Principle:
Principle #26Copying

Solution Approach 2:

The system performs preliminary actions by pre-configuring multiple copies of the processing circuitry for different possible execution paths before the actual execution decision is needed. This allows the system to have ready-to-execute instruction sets for both predicted and alternative paths, eliminating the need to flush the pipeline when predictions are wrong.

Inventive Principle:
Principle #10Preliminary action

2Speed

If the processing unit executes instructions sequentially with explicit storage for data values, then data consistency is maintained, but execution speed decreases due to storage access overhead

Engineering Contradiction:
Improveinstruction execution speedVSAvoidstorage management complexity
Core Design Contradiction:
SpeedVSDevice complexity

Solution Approach 1:

The patent extracts the data storage and management functions from the main execution path by using explicit storage mechanisms that are separately managed. This allows the processing circuitry to focus on execution while storage operations are handled independently, reducing the overhead on the critical execution path and improving instruction execution speed.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The system introduces an intermediary layer between the processing circuitry and the storage system. This intermediary manages data value communication between instructions, allowing the processing units to execute quickly while the intermediary handles the complexity of data consistency and storage management separately.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Adaptability or versatility

If multiple processing circuits are used to execute different instruction sets, then execution flexibility increases, but system complexity and resource usage increase

Engineering Contradiction:
Improveinstruction set flexibilityVSAvoidprocessing circuitry complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent segments the processing system into multiple independent processing circuits, each configured for specific instruction sets. This segmentation allows each unit to be simple and specialized, while the overall system achieves high flexibility. The segmentation is managed through a control mechanism that directs execution to the appropriate segment based on the instruction type needed.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS20260086816A1Optimizing execution of code on reconfigurable hardware using likely data values based on data sampling
Publication Date: 2026.03.26 NEXTSILICON LTD
  • US20260086816A1 patent drawing
  • US20260086816A1 patent drawing
  • US20260086816A1 patent drawing

AI summary

An apparatus for computing, comprising a processing circuitry configured for computing an outcome of executing a set of computer instructions comprising a group of data variables, by: identifying an initial state of the processing circuitry; executing a set of anticipated computer instructions produced based on the set of computer instructions and a likely data value, where the likely data value is a value of one the group of data variables anticipated to be computed by executing the set of computer instructions and computed using at least one program data value; and when identifying, while executing the set of anticipated computer instructions, a failed prediction where the data variable is not equal to the likely data value: restoring the initial state of the processing circuitry; and executing a set of alternative computer instructions, produced based on the set of computer instructions and the at least one likely data value.