Reconfigurable IC Scalable Architecture Crossbar Routing

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Solution Overview

Problem

The increasing complexity and density of integrated circuits (ICs) lead to high manufacturing costs, and existing reconfigurable ICs face challenges in scalability and flexible tradeoffs between area consumption and routability, particularly for general-purpose partially reconfigurable circuits.

Innovation Solution

A scalable architecture for reconfigurable ICs is introduced, featuring a combination of non-reconfigurable and reconfigurable function blocks interconnected through crossbar devices, allowing for flexible signal routing and efficient use of resources, enabling better tradeoffs between area consumption and routability.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If IC density and complexity are increased to improve functionality, then manufacturing cost increases substantially

Engineering Contradiction:
ImprovefunctionalityVSAvoidmanufacturing cost
Core Design Contradiction:
Adaptability or versatilityVSEase of manufacture

Solution Approach 1:

The IC is divided into fixed function blocks and reconfigurable function blocks. The reconfigurable blocks can be dynamically reconfigured to provide different functionalities, allowing the same physical hardware to serve multiple purposes and reduce the need for entirely new IC designs for different applications.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces reconfigurable function blocks that can change their operational characteristics dynamically. This allows the IC to adapt its functionality after manufacturing, providing cost-effective solutions for different applications without requiring entirely new mask sets for each variation.

Inventive Principle:
Principle #15Dynamics

2Adaptability or versatility

If reconfigurable IC architecture is designed for scalability, then flexibility in tradeoffs between area consumption and routability is improved

Engineering Contradiction:
ImprovescalabilityVSAvoidarchitecture complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The reconfigurable logic is segmented into multiple programmable logic blocks that can be independently configured. This modular approach allows scalability while managing complexity through standardized interfaces and hierarchical organization of reconfigurable elements.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent employs universal reconfigurable function blocks that can perform multiple logic functions. These blocks use standardized resources (logic elements, routing resources, carry chains) that can be configured for different purposes, providing scalability without proportionally increasing overall architecture complexity.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Adaptability or versatility

If more reconfigurable function blocks are added to improve adaptability, then area consumption increases

Engineering Contradiction:
ImprovereconfigurabilityVSAvoidarea consumption
Core Design Contradiction:
Adaptability or versatilityVSArea of stationary object

Solution Approach 1:

Multiple reconfigurable function blocks share common resources including routing resources, carry chains, and logic elements. This resource sharing allows the IC to provide high reconfigurability without linearly increasing area consumption, as the same physical resources can be dynamically allocated to serve different logical functions.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The reconfigurable function blocks use universal logic elements and routing resources that can be configured for different purposes. This multi-functionality allows a smaller number of physical resources to provide the functionality of a larger number of dedicated resources, reducing area consumption while maintaining adaptability.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS7274215B2Reconfigurable integrated circuits with scalable architecture including one or more adders
Publication Date: 2007.09.25 META SYSTEMS SARL
  • US7274215B2 patent drawing
  • US7274215B2 patent drawing
  • US7274215B2 patent drawing

AI summary

An integrated circuit (IC) includes a number of function blocks (FB), of which at least one is re-configurable. Each of the FBs may be a reconfigurable function or a non-reconfigurable function or recursively expanded with additional “nested” function blocks. The IC further includes a number of input pins, a number of output pins, an adder, and a number of crossbar devices. The elements, at least at the IC level, are coupled in a manner such that all input signals are provided to the FBs through a first subset of the crossbar devices, all internal signals are routed from one FB to another FB through a second subset of crossbar devices, and all output signals are routed from the FBs to the output pins through a third subset of crossbar devices. To increase routability and speed each of the crossbar device output has a single fanout. Additionally, each of the crossbar devices may provide only one input to each other crossbar device.