Reconfigurable IC Layout With Selective Reconfiguration Gating
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Solution Overview
Problem
Configurable integrated circuits (ICs) consume significant power during reconfiguration and operation due to the need to switch between different configuration cells, leading to inefficiencies in power usage, especially when configuration values change frequently.
Innovation Solution
Implementing a placement and routing process that minimizes the number of configuration value changes by grouping reconfigurable circuits into rows and using select drivers to manage configuration signals, with the option to gate reconfiguration signals when no changes are necessary, thereby reducing energy consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If reconfigurable circuits are switched between different configuration cells to implement different functions, then adaptability is improved, but energy consumption increases due to frequent configuration value changes
Solution Approach 1:
The patent applies preliminary action by pre-grouping reconfigurable circuits into rows and pre-organizing configuration cells before actual configuration changes occur. Select drivers are pre-positioned to manage configuration signals, allowing the system to maintain current configurations and avoid unnecessary switching, thereby reducing energy consumption while preserving adaptability.
Solution Approach 2:
The patent implements dynamics by introducing selective configuration signal gating that dynamically controls when configuration changes occur. The system can dynamically choose to maintain existing configurations or switch to new configurations based on actual needs, making the configuration process adaptive and energy-efficient rather than rigid and continuous.
2Adaptability or versatility
If configuration values are frequently changed to update circuit functionality, then adaptability is improved, but energy consumption increases due to toggling
Solution Approach 1:
The patent extracts the configuration signal management function into separate select drivers that control individual rows of reconfigurable circuits. This separation allows the main circuit logic to focus on functionality while the select drivers independently manage configuration signal distribution, enabling selective gating of configuration changes to minimize unnecessary toggling and energy loss.
Solution Approach 2:
The patent applies preliminary action by pre-organizing reconfigurable circuits into structured rows with associated select drivers and configuration cells. This preliminary organization enables the system to efficiently determine which configuration changes are necessary before execution, avoiding redundant configuration value changes and reducing energy consumption during reconfiguration operations.
3Productivity
If all reconfigurable circuits are continuously reconfigured to maintain optimal performance, then productivity is improved, but energy consumption increases
Solution Approach 1:
The patent applies partial action by implementing selective configuration updating where only specific rows of reconfigurable circuits receive configuration signals when needed, rather than continuously reconfiguring all circuits. The select drivers enable partial updates to subsets of circuits based on actual operational requirements, reducing energy consumption while maintaining productivity for active circuit segments.
Solution Approach 2:
The patent implements dynamics through configurable signal gating that adaptively controls the timing and scope of reconfiguration activities. The system dynamically adjusts configuration signal distribution based on operational needs, allowing circuits to remain in stable configurations during non-critical periods and only reconfigure when productivity improvements are actually required, thereby balancing energy consumption with operational efficiency.
Data Source
AI summary
A system and method for reducing power consumption in a reconfigurable integrated circuit. Some embodiments provide placement and routing programs that reduce the number of bits to be reconfigured. Some embodiments provide placement and routing programs that increase the number of groups of circuits that do not need reconfiguration at some times. Some embodiments include circuits that selectively block reconfiguration.