Reconfigurable Image Scaling Circuit for Mobile Systems
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing image scaling circuits in mobile systems face challenges in efficiently reconfiguring to handle both image enlargement and reduction with limited resources, particularly in handling high-definition images and low-definition images effectively.
Innovation Solution
A reconfigurable image scaling circuit is designed with a horizontal scalar, a bufferer, and a vertical scalar, where the bufferer includes a mapper and multiple buffers, allowing for dynamic scaling and mapping relation adjustments based on user-defined values and pixel data ratios, enabling flexible image scaling operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If a fixed image scaling circuit is used, then the circuit structure is simple, but it cannot handle both image enlargement and reduction with limited resources
Solution Approach 1:
The patent implements dynamic reconfiguration of the image scaling circuit by allowing the scaling order between horizontal and vertical scalars to be changed based on operation mode. The circuit can switch between horizontal-scaling-first mode and vertical-scaling-first mode, enabling adaptive handling of both enlargement and reduction operations with limited hardware resources.
Solution Approach 2:
The patent designs a universal image scaling circuit that can perform multiple functions (enlargement and reduction) using the same hardware resources. By implementing shared buffers and configurable scaling operations, the circuit serves both as an enlargement unit and a reduction unit, eliminating the need for separate dedicated circuits for each function.
2Manufacturing precision
If the number of buffers is increased to improve image quality, then image processing quality improves, but device complexity and resource consumption increase
Solution Approach 1:
The patent dynamically adjusts the number of active buffers based on the scaling operation mode and image data characteristics. The buffer allocation is flexible and can be reconfigured according to whether enlargement or reduction is being performed, allowing optimal use of limited buffer resources without wasting capacity on unnecessary buffers.
Solution Approach 2:
The patent changes operational parameters such as the number of reference rows and buffer mapping relations to optimize image quality. By adjusting these parameters dynamically, the system achieves high image quality without requiring a fixed large number of buffers, instead utilizing buffers efficiently based on actual processing needs.
3Manufacturing precision
If the mapping relation between reference row data and buffers is fixed, then the circuit operation is simple, but image quality optimization is limited
Solution Approach 1:
The patent implements dynamic mapping relations between reference row data and buffers that can be reconfigured based on the scaling operation mode. The mapper unit dynamically assigns different buffer indices to different reference rows depending on whether horizontal or vertical scaling is performed first, optimizing data access patterns and image quality without requiring complex fixed configurations.
Data Source
AI summary
A reconfigurable image scaling circuit includes a horizontal scalar, a bufferer, and a vertical scalar. The horizontal scalar is configured to generate a horizontally scaled image data by scaling an input image data horizontally. The bufferer includes a mapper and a plurality of buffers. The plurality of the buffers are configured to store the horizontally scaled image data. The vertical scalar is configured to generate an output image data by scaling the horizontally scaled image vertically using a vertical scaling method.