Reconfigurable Inter-Processor Communication in Vehicle Controllers

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Solution Overview

Problem

Current vehicle electronic controllers face increased complexity and resource limitations when running multiple software applications on a single processor, requiring efficient inter-processor communication mechanisms that can be reconfigured to optimize throughput and bandwidth.

Innovation Solution

A system and method for reconfigurable inter-processor communications, utilizing send and receive buffers, tables, and infrastructure services with protocols that support flexible message rates and low-level communication links, enabling dynamic reassignment of runnables and optimized resource allocation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If multiple software applications are run on a single processor, then hardware cost is reduced, but controller complexity increases due to scheduling requirements and resource limitations

Engineering Contradiction:
Improvehardware costVSAvoidcontroller complexity
Core Design Contradiction:
Quantity of substanceVSDevice complexity

Solution Approach 1:

The system divides the controller into multiple independent processors, each capable of executing software applications autonomously. This segmentation eliminates the need for complex scheduling on a single processor while reducing hardware cost compared to using multiple fully independent controllers.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Multiple processors share common hardware resources including memory, I/O interfaces, and communication bus. This multi-functionality allows cost reduction by avoiding duplicate hardware while maintaining the ability to run multiple applications in parallel.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Adaptability or versatility

If runnables are reassigned between processors, then system adaptability improves, but throughput and bandwidth are reduced due to reconfiguration overhead

Engineering Contradiction:
Improvesystem adaptabilityVSAvoidthroughput
Core Design Contradiction:
Adaptability or versatilityVSProductivity

Solution Approach 1:

The inter-processor communication system is designed to be dynamically reconfigurable, allowing runnables to be reassigned between processors based on system requirements. The communication infrastructure supports runtime changes in message routing and processor roles.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

Message routing tables and communication paths are pre-configured and cached to enable rapid reassignment of runnables. This preliminary preparation minimizes the overhead of reconfiguration, allowing the system to maintain high throughput even when adaptability is required.

Inventive Principle:
Principle #10Preliminary action

3Measurement precision

If inter-processor communication protocols include node-specific syntax, then communication precision is improved, but reconfiguration effort increases when moving runnables between processors

Engineering Contradiction:
Improvecommunication precisionVSAvoidreconfiguration effort
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

A universal message format is implemented that can carry node-specific information through standardized fields. This allows precise communication between different processor nodes while maintaining protocol consistency that simplifies reconfiguration when runnables are moved between processors.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS9378072B2Mechanisms and apparatus for embedded controller reconfigurable inter-processor communications
Publication Date: 2016.06.28 GM GLOBAL TECHNOLOGY OPERATIONS LLC
  • US9378072B2 patent drawing
  • US9378072B2 patent drawing
  • US9378072B2 patent drawing

AI summary

A system and method for reconfigurable inter-processor communications in a controller. The system and method include providing multiple processors in the controller and generating a send buffer and a receive buffer for each of the processors. The system and method further include generating a send table and a receive table for each of the processors where the send table stores identifying information about messages being sent and where the receive table stores identifying information about messages being received, and providing infrastructure services that include protocols for sending and receiving messages between multiple processors in the controller.