Reconfigurable Logic Circuit Throughput Optimization
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Solution Overview
Problem
Reconfigurable logic circuits, specifically FPGAs, face interference between virtual FPGAs, leading to bottlenecks that deteriorate throughput and hinder real-time video analysis performance in mobile devices, particularly for demanding applications like virtual/augmented reality.
Innovation Solution
A method and system for optimizing reconfigurable logic circuits by profiling and adjusting parameters such as sampling rates and object recognition models to maximize throughput, involving a configuration controller that initializes parameters to maximum values and gradually decreases them to find optimal values that minimize latency and maximize accuracy, ensuring efficient video processing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If multiple virtual FPGAs are deployed on a physical FPGA to improve processing capability, then the processing speed and functionality are enhanced, but interference and bottlenecks occur between virtual FPGAs causing throughput deterioration
Solution Approach 1:
The patent applies parameter changes by dynamically adjusting the sampling rate parameter of video sequences. The system profiles throughput performance at different sampling rates and selects optimal parameters to maximize processing throughput while minimizing interference between virtual FPGAs. This allows the system to adapt to varying workloads and maintain optimal performance across multiple virtual FPGAs sharing physical hardware resources.
2Measurement precision
If the sampling rate is increased to improve video processing accuracy, then the processing accuracy is enhanced, but the throughput deteriorates due to increased processing time
Solution Approach 1:
The system performs profiling to characterize the relationship between sampling rates and throughput performance. By analyzing this relationship, the system determines optimal sampling rate parameters that balance accuracy requirements with throughput constraints. This allows dynamic adjustment of the sampling rate parameter based on actual performance characteristics rather than using fixed high accuracy settings that would always reduce throughput.
Solution Approach 2:
The patent implements a feedback mechanism where the system profiles throughput at different sampling rates and uses this information to make informed decisions about optimal parameter selection. The profiling results provide feedback that guides the system in selecting sampling rates that achieve the required accuracy while maintaining acceptable throughput performance.
3Measurement precision
If the parameter search space is increased to find optimal parameters, then the optimization accuracy is improved, but the time required for parameter optimization increases
Solution Approach 1:
The system performs preliminary profiling actions to characterize throughput performance at different parameter values before actual video processing begins. By conducting this profiling in advance and storing the results, the system avoids the need to perform exhaustive parameter searches during real-time processing. The pre-computed profiling data enables quick parameter selection that balances optimization accuracy with time constraints.
Data Source
AI summary
A method of operating a reconfigurable logic circuit includes; receiving a video sequence, profiling throughput of the video sequence with regard to a parameter constituting the reconfigurable logic circuit to generate a profiling result, initializing the parameter to a maximum value, evaluating throughput of the video sequence with regard to a current parameter value based on the profiling result, decreasing the current parameter value when throughput with regard to the current parameter value is not a maximum value, and determining that the current parameter value is an optimal parameter when throughput with regard to the current parameter value is the maximum value, and analyzing the video sequence based on the optimal parameter.