Reconfigurable Electronic Device With Lower Gate Electrodes
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Solution Overview
Problem
Reconfigurable electronic devices based on Si nanowire technology face challenges such as inaccurate junction position control, increased parasitic resistance and capacitance, voltage coupling issues, low-frequency noise, and limited integration due to thick gate insulating films and Schottky junctions, which hinder miniaturization and functionality.
Innovation Solution
The use of a reconfigurable electronic device with a non-volatile memory function and a divided lower electrode structure, where lower electrodes are formed using deposition, etching, and CMP processes, and a lower gate insulating film with a non-volatile memory function is introduced, allowing independent voltage application and improved position control of gate electrodes, reducing parasitic components, and enhancing integration by minimizing channel length and area.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If a non-volatile memory function is introduced with a divided lower electrode structure, then manufacturing precision and process reproducibility are improved, but device complexity increases
Solution Approach 1:
The lower electrode is divided into multiple independent segments that can be independently controlled. This segmentation allows precise control of junction positions while maintaining a manageable structure through modular design.
Solution Approach 2:
The electrode structure transitions from a planar configuration to a three-dimensional arrangement with lower electrodes positioned beneath the channel, enabling improved position control without excessive planar complexity.
2Manufacturing precision
If independent lower electrodes are used to control Schottky junction resistance, then manufacturing precision is improved, but parasitic resistance increases
Solution Approach 1:
By positioning the controlling electrodes in the lower dimension beneath the channel rather than alongside it, the design achieves precise junction control while minimizing parasitic resistance through optimized current paths.
3Productivity
If the lower gate insulating film thickness is reduced to improve current driving performance, then productivity is improved, but reliability deteriorates due to increased leakage current
Solution Approach 1:
The gate insulating film is segmented into multiple layers with different functional roles. The lower gate insulating film can be optimized for current driving performance while upper layers provide leakage control, allowing both requirements to be satisfied simultaneously.
Solution Approach 2:
The gate insulating film structure uses composite material layers with different electrical properties, combining materials that provide high current drive capability with those that suppress leakage, achieving both performance goals.
4Adaptability or versatility
If Schottky junctions are used in the device structure, then device functionality is improved, but low-frequency noise increases
Solution Approach 1:
The Schottky junction functionality is extracted and localized to specific regions controlled by lower electrodes, allowing the main channel to operate with reduced noise while retaining reconfigurable functionality where needed.
5Adaptability or versatility
If top-gate-based reconfigurable devices are implemented, then device functionality is improved, but area occupation increases and integration density decreases
Solution Approach 1:
Instead of placing control electrodes on top of the channel, the design inverts the configuration by positioning the primary control electrodes below the channel, reducing the area occupied by control structures and improving integration density.
Solution Approach 2:
The control electrode configuration moves from a planar top-gate arrangement to a three-dimensional structure with lower electrodes, enabling compact integration while maintaining full reconfigurable functionality.
Data Source
AI summary
Provided is a reconfigurable electronic device which is implemented by forming independent upper gates and lower gates, wherein in comparison with an existing reconfigurable electronic device having the same function, a degree of integration is greatly increased, a non-volatile memory function is included in the device, and in operation of a reconfigurable circuit based on an independent lower electrode array, dynamic parasitic component is decreased and a complexity of wire lines can be reduced, so that power consumption can be reduced. In addition, in comparison with an existing reconfigurable electronic device, the device exhibits remarkably excellent performance in terms of various characteristics such as diversity of functions of a multi-functional device, alignment margin in process, performance of implementation of infinitesimal electrical doping in a channel, compatibility with bottom-up and top-down method in process, and compatibility with a 1D or 2D material.