Reconfigurable Message Processor for High-Rate Data Streams
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Solution Overview
Problem
Conventional message processing systems face challenges in interfacing with multiple communication protocols and handling high-data-rate streams, as they require dedicated hardware components that are difficult to modify and expand, leading to complexity and bottlenecks.
Innovation Solution
A message processing apparatus with a reconfigurable message processor that includes multiple processor sub-modules and separate instruction and payload memories, allowing for on-the-fly reconfiguration and flexible support of multiple protocols, enabling efficient processing of high-data-rate streams by bypassing the main message processor and allowing parallel processing tasks.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If dedicated hardware components are used for each protocol, then processing speed and reliability are improved, but device complexity and difficulty of modification increase
Solution Approach 1:
The message processor is designed with a universal architecture that can handle multiple communication protocols (CPRI, OBSAI RP3, Ethernet, Fibre Channel) through a single reconfigurable hardware platform. The processor can be dynamically programmed to support different protocols without requiring separate dedicated hardware for each protocol, thus reducing system complexity while maintaining processing reliability.
Solution Approach 2:
The hardware architecture incorporates dynamic reconfiguration capabilities, allowing the message processor to adapt its processing logic in real-time based on the required protocol. This dynamic nature enables the system to switch between different protocol handling modes without physical hardware changes, resolving the contradiction between reliability and complexity.
2Productivity
If dedicated hardware components are used for each protocol, then processing speed is improved, but ease of manufacture and expansion decrease
Solution Approach 1:
A single message processor unit is designed to universally support multiple protocols through reconfigurable logic, eliminating the need to manufacture and integrate separate dedicated hardware components for each protocol. This universal design simplifies the manufacturing process and makes system expansion to support new protocols much easier, as it only requires software/firmware reconfiguration rather than physical hardware changes.
3Productivity
If software is integrated and embedded to hardware, then processing speed is improved, but adaptability and ease of modification decrease
Solution Approach 1:
The system employs dynamically reconfigurable hardware with embedded software that can be programmed and modified during operation. This allows the processor to maintain high processing speeds through hardware implementation while simultaneously adapting to different protocols by loading appropriate processing logic, thus resolving the contradiction between speed and adaptability.
Solution Approach 2:
The message processor is designed with pre-configured processing pipelines and logic structures that can be rapidly reprogrammed for different protocols. The hardware is preliminarily prepared with the capability to support multiple protocols, and the specific protocol handling is activated through pre-loaded configuration data, maintaining speed while enabling adaptability.
4Adaptability or versatility
If multiple dedicated message processing blocks are provided for multiple protocols, then protocol support completeness is improved, but device complexity and processing overhead increase
Solution Approach 1:
Instead of providing multiple dedicated message processing blocks for different protocols, the invention implements a single universal message processing block that can be reconfigured to handle any supported protocol. This universal block eliminates the need for multiple parallel processing units, significantly reducing device complexity while maintaining complete protocol support through software-defined processing logic.
5Adaptability or versatility
If multiple dedicated message processing blocks are provided for multiple protocols, then protocol support completeness is improved, but processing overhead and system resource usage increase
Solution Approach 1:
A single reconfigurable message processing block handles all protocol types, eliminating the redundant overhead associated with maintaining multiple dedicated processing blocks. The universal processor achieves protocol support completeness by dynamically switching its processing logic rather than maintaining parallel processing paths, thereby reducing energy consumption and processing overhead while supporting multiple protocols.
Data Source
AI summary
A system for processing messages of a high rate data stream and an apparatus including: a message processor including a plurality of processor sub-modules and configured to read an input data stream, process the input data stream, and to output an output data stream; at least one payload memory storing data related to the input data stream and accessible to the message processor; at least one instruction memory accessible to the message processor and storing computer program instructions configuring the message processor to process the input data stream; and an application processor configured to rewrite the at least one instruction memory.


