Dynamically Reconfigurable Packet Processing Pipeline Architecture

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Solution Overview

Problem

The existing packet processing architectures in computer networks are restrictive, particularly at high speeds (10-100 Gbps), as they rely on fixed pipelines that limit flexibility and efficiency in processing data packets.

Innovation Solution

A dynamically reconfigurable pipeline architecture is introduced, where multiple next processing stage modules are operably coupled to allow data packets to flow to any subsequent stage in a user-configurable manner, enabling dynamic configuration, feedback loops, and bypassing of stages, thereby supporting high-speed packet processing engines.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If a fixed pipeline architecture is used for packet processing, then the processing speed can be optimized for specific protocols, but the system lacks flexibility to adapt to different packet types and processing requirements

Engineering Contradiction:

Improvepacket processing speedVSAvoidpipeline configuration flexibility

Core Design Contradiction:

ProductivityVSAdaptability or versatility

Solution Approach 1:

The patent implements a dynamically reconfigurable pipeline where the sequence and activation of processing stages can be modified at runtime based on packet type and processing requirements. This allows the system to adapt its architecture dynamically rather than being fixed, resolving the contradiction between optimization for specific protocols and flexibility for different packet types.

Inventive Principle:

Principle #15Dynamics

Solution Approach 2:

The patent creates a universal pipeline architecture that can handle multiple packet types and protocols through a single reconfigurable structure. The pipeline stages are designed to be universally applicable across different processing scenarios, allowing the same hardware to serve multiple functions by reconfiguring which stages are active and in what sequence.

Inventive Principle:

Principle #6Universality (Multi-functionality)

2Adaptability or versatility

If multiple processing stages are implemented to handle diverse packet types, then the system becomes more versatile, but the processing latency increases due to sequential execution

Engineering Contradiction:

Improvepacket type handling capabilityVSAvoidprocessing latency

Core Design Contradiction:

Adaptability or versatilityVSLoss of time

Solution Approach 1:

The patent performs preliminary classification of packets early in the pipeline to determine which processing stages are needed. This allows the system to activate only the necessary stages for each packet type, avoiding unnecessary sequential processing and reducing latency while maintaining versatility.

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The patent divides the processing pipeline into independent, modular stages that can be selectively activated. Each stage handles a specific processing function, and the system can configure which segments are active based on packet requirements, reducing the number of sequential operations needed and thereby reducing latency.

Inventive Principle:

Principle #1Segmentation

3Productivity

If hardware accelerators are used to improve processing speed, then the productivity increases, but the device complexity and power consumption increase

Engineering Contradiction:

Improvepacket processing throughputVSAvoidhardware architecture complexity

Core Design Contradiction:

ProductivityVSDevice complexity

Solution Approach 1:

The patent uses a dynamically reconfigurable pipeline that can adapt its hardware resource usage based on workload characteristics. This allows the system to optimize throughput by activating hardware acceleration only when needed, rather than maintaining complex hardware structures that are always active, thereby improving productivity while managing complexity.

Inventive Principle:

Principle #15Dynamics

4Adaptability or versatility

If a reconfigurable pipeline is implemented to improve flexibility, then the adaptability increases, but the control complexity and configuration overhead increase

Engineering Contradiction:

Improvepipeline reconfiguration capabilityVSAvoidcontrol logic complexity

Core Design Contradiction:

Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent performs preliminary classification and determination of the required pipeline configuration early in the processing flow. This preliminary action allows the system to set up the appropriate pipeline sequence in advance, reducing the complexity of real-time control decisions and simplifying the configuration management while maintaining high adaptability.

Inventive Principle:

Principle #10Preliminary action

Data Source

PatentUS10826982B2Packet processing architecture and method therefor

Publication Date: 2020.11.03 NXP USA INC

AI summary

A packet processing architecture includes a plurality of packet processing stages, wherein at least one of the packet processing stages includes multiple next processing stage modules that are operably coupled to respective further processing stages, wherein the multiple next processing stage modules are dynamically configurable.