Reconfigurable Parallel Processor Circular Data Path
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Solution Overview
Problem
In multi-core processor architectures, particularly in SIMT systems like GPUs, providing access to all cache memories for multiple processing elements while optimizing for area, delay, and power consumption is a challenge.
Innovation Solution
A processor design with a centralized-column approach, where columns of vector processing units form a circular data path with a temporary storage buffer, allowing each column to access all cache blocks and memory, and utilizing column-to-column interfaces to create a circular data flow that optimizes area, delay, and power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If many processing elements and cache memories are packed in one processor to enable massive parallel processing, then processing capability is improved, but providing access to all cache memories for all processing elements becomes challenging and increases complexity
Solution Approach 1:
The processor is segmented into multiple columns, each containing processing elements and associated cache memories. This segmentation allows each column to operate semi-independently, reducing the complexity of providing universal access to all cache memories by all processing elements while maintaining parallel processing capability.
Solution Approach 2:
The patent introduces a circular data path that connects columns in a loop, adding a dimensional aspect to the memory access topology. This circular arrangement provides multiple access paths between processing elements and cache memories, reducing access complexity while maintaining high parallel processing capability.
2Speed
If a traditional linear data path is used between columns, then routing is simple, but delay increases due to longer routing distances
Solution Approach 1:
The patent implements a circular data path instead of a linear arrangement, where the final column loops back to the first column via a temporary storage buffer. This curved/circular topology reduces the maximum routing distance between any two columns compared to a linear path, thereby reducing data routing delay and improving data flow speed.
3Area of stationary object
If columns are arranged in a circular fashion with short routing distances, then area efficiency is improved, but the data path becomes more complex
Solution Approach 1:
The patent merges the circular data path functionality with the existing column-to-column interfaces by using the final column's output FIFOs to drive the temporary storage buffer, which then drives the first column. This integration approach improves area efficiency while managing data path complexity through unified design rather than separate components.
4Area of stationary object
If output FIFOs are placed far from muxing logic to accommodate circular arrangement, then area optimization is achieved, but routing distance increases
Solution Approach 1:
The patent employs dynamic muxing logic within each column that can selectively direct signals to different destinations (memory port, processing element, or output FIFOs and next column). This dynamic switching capability allows flexible routing that accommodates the circular arrangement while keeping routing distances optimized for different operational modes.
Data Source
AI summary
Processors, systems and methods are provided for thread level parallel processing. A processor may include a plurality of columns of vector processing units arranged in a two-dimensional column array with a plurality of column stacks placed side-by-side in a first direction and each column stack having two columns stacked in a second direction and a temporary storage buffer. Each column may include a processing element (PE) that has a vector Arithmetic Logic Unit (ALU) to perform arithmetic operations in parallel threads. At a first end of the column array in the first direction, two columns in the column stack are coupled to the temporary storage buffer for one-way data flow. At a second end of the column array in the first direction, two columns are coupled to each other for one-way data flow. The column array and the temporary storage buffer may form a one-way circular data path.