Reconfigurable Computing Platform Multitasking via Device Driver
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Solution Overview
Problem
Current multitasking computing systems lack support for incorporating hard real-time properties and efficient resource management in reconfigurable hardware, leading to challenges in task scheduling and execution on heterogeneous multi-processor platforms.
Innovation Solution
A reconfigurable computing platform with a heterogeneous multi-processor architecture, including instruction set processors and reconfigurable matrices, is developed, featuring a hardware/software operating system that provides a clear interface, supports concurrent task execution, and manages state information, allowing for dynamic hardware/software multitasking and partial reconfiguration of reconfigurable devices.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If a general purpose operating system is used to manage hardware resources, then ease of operation and task concurrency are improved, but the ability to incorporate hard real-time properties and efficient resource management on reconfigurable hardware deteriorates
Solution Approach 1:
The patent introduces a device driver as an intermediary layer between the general purpose operating system and the reconfigurable hardware device. This device driver translates high-level task requests from the OS into hardware-specific configuration and control signals, enabling the OS to manage hardware resources effectively while maintaining hard real-time properties through dedicated hardware execution paths.
Solution Approach 2:
The system segments task execution into two distinct pathways: software-based task execution through the general purpose processor and hardware-based task execution through the reconfigurable device. This segmentation allows critical real-time tasks to be offloaded to hardware for deterministic execution while non-critical tasks remain in software, resolving the contradiction between ease of operation and real-time reliability.
2Reliability
If a device driver approach is used for dedicated hardware devices, then hard real-time properties can be incorporated, but ease of operation deteriorates as application designers become responsible for task execution management
Solution Approach 1:
The device driver is designed with universal functionality to manage both software and hardware task execution through a unified interface. It provides multi-functional capabilities including task scheduling, resource allocation, and execution monitoring that work consistently across different task types, thereby maintaining ease of operation while supporting hard real-time properties through hardware execution paths.
3Productivity
If multiple processing resources are available on a computing platform, then productivity and computing power are improved, but device complexity and scheduling difficulty increase
Solution Approach 1:
The device driver implements feedback mechanisms that continuously monitor the state of multiple processing resources including utilization levels, task priorities, and real-time performance metrics. Based on this feedback, the driver dynamically adjusts task allocation and scheduling decisions, simplifying the management of complex multi-resource environments while maximizing productivity through intelligent resource orchestration.
Data Source
AI summary
A platform supporting reconfigurable computing, enabling the introduction of reconfigurable hardware into portable devices is described. Dynamic hardware/software multitasking methods for a reconfigurable computing platform including reconfigurable hardware devices such as gate arrays, especially FPGA's, and software, such as dedicated hardware/software operating systems and middleware, adapted for supporting the methods, especially multitasking, are described. A computing platform, which is a heterogeneous multi-processor platform, containing one or more instruction set processors (ISP) and a reconfigurable matrix (for instance a gate array, especially an FPGA), adapted for (dynamic) hardware/software multitasking is described.


